參數(shù)資料
型號(hào): P80C52UFPN
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 80C51 8-bit microcontroller family 8K.64K/256.1K OTP/ROM/ROMless, low voltage 2.7V.5.5V, low power, high speed 33 MHz
中文描述: 8-BIT, MROM, 33 MHz, MICROCONTROLLER, PDIP40
文件頁(yè)數(shù): 45/56頁(yè)
文件大?。?/td> 337K
代理商: P80C52UFPN
Philips Semiconductors
Product specification
8XC52/54/58/80C32
8XC51FA/FB/FC/80C51FA
8XC51RA+/RB+/RC+/RD+/80C51RA+
80C51 8-bit microcontroller family
8K–64K/256–1K OTP/ROM/ROMless, low voltage (2.7V–5.5V),
low power, high speed (33MHz)
1999 Apr 01
45
Table 9. EPROM Programming Modes
MODE
RST
PSEN
ALE/PROG
EA/V
PP
P2.7
P2.6
P3.7
P3.6
Read signature
1
0
1
1
0
0
0
0
Program code data
1
0
0*
V
PP
1
0
1
1
Verify code data
1
0
1
1
0
0
1
1
Pgm encryption table
1
0
0*
V
PP
1
0
1
0
Pgm security bit 1
1
0
0*
V
PP
1
1
1
1
Pgm security bit 2
1
0
0*
V
PP
1
1
0
0
Pgm security bit 3
NOTES:
1. ‘0’ = Valid low for that pin, ‘1’ = valid high for that pin.
2. V
PP
= 12.75V
±
0.25V.
3. V
CC
= 5V
±
10% during programming and verification.
*
ALE/PROG receives 5 programming pulses for code data (also for user array; 5 pulses for encryption or security bits) while V
PP
is held at
12.75V. Each programming pulse is low for 100
μ
s (
±
10
μ
s) and high for a minimum of 10
μ
s.
1
0
0*
V
PP
0
1
0
1
Table 10. Program Security Bits for EPROM Devices
PROGRAM LOCK BITS
1, 2
SB1
SB2
SB3
PROTECTION DESCRIPTION
1
U
U
U
No Program Security features enabled. (Code verify will still be encrypted by the Encryption Array if
programmed.)
2
P
U
U
MOVC instructions executed from external program memory are disabled from fetching code bytes
from internal memory, EA is sampled and latched on Reset, and further programming of the EPROM
is disabled.
3
P
P
U
Same as 2, also verify is disabled.
4
P
P
P
Same as 3, external execution is disabled.
NOTES:
1. P – programmed. U – unprogrammed.
2. Any other combination of the security bits is not defined.
相關(guān)PDF資料
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