參數(shù)資料
型號： P83C270AAR
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： Microcontrollers for NTSC TVs with On-Screen Display OSD and Closed Caption CC
中文描述： 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PDIP52
文件頁數(shù)： 63/80頁
文件大小： 266K
代理商： P83C270AAR
1999 Jun 11
63
Philips Semiconductors
Product specification
Microcontrollers for NTSC TVs with On-Screen
Display (OSD) and Closed Caption (CC)
P8xCx70 family
20 PROGRAMMER
The P87Cx70 OTP contains two EPROM modules, one
64-kbyte system EPROM and one 8-kbyte character
EPROM.
Users can program or verify both system and character
EPROM with a PC using Intel HEX format.
20.1
EPROM Interface
Port 0 and Port 2 are used as the 16-bit address bus;
Port 0 for the higher address byte and Port 2 for the lower
address byte. Port 3 is used as an 8-bit bidirectional data
bus during programming and verify operations.
For control signals, ALE/PROG is used as the write strobe
(WE) and P1.0 is used as the output enable (OE). Pin 28
is the programming voltage (V
PP
) input and requires
12.75 V during the Programming mode and 5 V during the
Verification mode. The required input on the RESET,
PSEN and P1.0 to P1.4 pins is dependent upon the mode
selected.
Signal states for the three modes are specified in
Table 104 and the timing characteristics of these signals
are detailed in Section 20.5.
20.2
OTP application mode
The OTP application mode consists of two major
sub-modes: Programming mode and Verify mode.
The pin assignment during OTP programming and
verification operations is specified in Table 105.
20.2.1
P
ROGRAMMING MODE
The Programming mode performs three operations: main
64-kbyte OTP, extra row programming and select two
bytes programming.
The main 64-kbyte OTP operation is the core function of
programming. The customer can program the software
using an EPROM writer. Extra row programming is similar
to test ROM in mask ROM and can be used to store
production IDs, testing patterns etc. The select two bytes
programming operation is used to speed up the
programming of the checker board.
The Programming configuration is shown in Fig.28.
20.2.2
V
ERIFY MODE
The Verify mode performs two operations: Program verify
and Extra row read. The program verify operation checks
that the value programmed is correct. The Extra row read
mode is similar to the Program verify mode and ensures
that the extra row programming is correct.
The Program verification configuration is shown in Fig.29.
20.3
Programming format for character EPROM
The character EPROM programming data format contains
12-bit OSD data for each character row; 4 bits from OSDH
and 8 bits from OSDL. The encoding sequence is shown
in Fig.30.
The address range of the 8-kbyte character EPROM is
from C000H to DFFFH.
20.4
Programming format for system EPROM
The system EPROM format is the same as for normal
EPROM and is programmed sequentially using Intel Hex
format.
The address range of the 64-kbyte system EPROM is from
0000H to FFFFH.
Table 104
OTP function table
OPERATION MODE
RESET
PSEN
ALE/WE
EA/V
PP
V
PP
V
DD
V
PP
P1.3
P1.2
P1.1
P1.0/OE
Programming
Program verify
2-byte programming
1
1
1
0
0
0
LOW pulse
H
LOW pulse
1
1
0
1
1
0
1
1
1
H
LOW pulse
H
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