參數(shù)資料
型號: P83CL782HDP
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: Low voltage 8-bit microcontrollers with UART and I2C-bus
中文描述: 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PDIP40
文件頁數(shù): 20/76頁
文件大小: 342K
代理商: P83CL782HDP
1997 Mar 14
20
Philips Semiconductors
Product specification
Low voltage 8-bit microcontrollers with
UART and I
2
C-bus
P83CL781; P83CL782
11.3
Timer/Counter 2 Control Register (T2CON)
Table 1
Timer/Counter 2 Control Register (SFR address C8H)
Table 2
Description of T2CON bits
Table 3
Timer 2 operating modes; X = don’t care
7
6
5
4
3
2
1
0
TF2
EXF2
GF2
RTCLK
EXEN2
TR2
C/T2
CP/RL2
BIT
SYMBOL
DESCRIPTION
7
TF2
Timer 2 overflow flag
. Set by a Timer 2 overflow and must be cleared by software. TF2
will not be set when RTCLK = 1.
Timer 2 external flag.
Set when either a capture or reload is caused by a negative
transition on T2EX and when EXEN2 = 1. When Timer T2 interrupt is enabled,
EXF2 = 1 will cause the CPU to vector to Timer 2 interrupt routine. EXF2 must be
cleared by software.
General purpose flag
bit.
Receive/transmit clock flag
. When set, causes the UART serial port to use Timer 2
overflow pulses for its receive and transmit clock in Modes 1 and 3. RTCLK = 0 causes
Timer 1 overflows to be used for the receive and transmit clock.
Timer 2 external enable flag
. When set, allows a capture or reload to occur as a result
of a negative transition on T2EX, if Timer 2 is not being used to clock the serial port.
EXEN2 = 0, causes Timer 2 to ignore events at T2EX.
Start/stop control for Timer 2
. TR2 = 1 starts the timer.
Timer or counter select for Timer 2
. C/T2 = 0 selects the internal timer with a clock
frequency of
1
12
×
f
osc
. C/T2 = 1 selects the external event counter; negative edge
triggered.
Capture/Reload flag
. When set, captures will occur on negative transitions at T2EX, if
EXEN2 = 1. When cleared, auto-reloads will occur either with Timer 2 overflows or
negative transitions at T2EX when EXEN2 = 1. When RTCLK = 1, this bit is ignored and
the timer is forced to auto-reload on a Timer 2 overflow.
6
EXF2
5
4
GF2
RTCLK
3
EXEN2
2
1
TR2
C/T2
0
CP/RL2
RTCLK
CP/RL2
TR2
MODE
0
0
1
X
0
1
X
X
1
1
1
0
16-bit Auto-reload
16-bit Capture
Baud Rate Generator
Off
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