參數(shù)資料
型號: P87C51FB-JN
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 80C51 8-bit microcontroller family 8K.64K/256.1K OTP/ROM/ROMless, low voltage 2.7V.5.5V, low power, high speed 33 MHz
中文描述: 8-BIT, OTPROM, 33 MHz, MICROCONTROLLER, PDIP40
封裝: 0.600 INCH, PLASTIC, MO-015, SOT-129-1, DIP-40
文件頁數(shù): 12/34頁
文件大?。?/td> 394K
代理商: P87C51FB-JN
2001 Apr 06
12
Philips Semiconductors
Preliminary specification
P87C51MB2/P87C51MC2
80C51 8-bit microcontroller family with extended memory
64KB/96KB OTP with 2KB/3KB RAM
Notes:
*
SFRs are bit addressable.
# SFRs are modified from or added to the 80C51 SFRs.
Extended SFRs accessed by preceeding the instruction with 51MX escape (opcode A5h).
-
Reserved bits, must be written with 0’s.
& Power on reset is 10H. Other reset is 00H.
§ BRGR1 and BRGR0 must only be written if BRGEN in BRGCON SFR is ’0’. If any of them is written if BRGEN = 1, result is
unpredictable.
% The unimplemented bits (labeled ’-’) in the SFRs are ’X’s (unknown) at all times. ’1’s should NOT be written to these bits, as
they may be used for other purposes in future derivatives. The reset values shown for these bits are ’0’s although they are
unknown when read.
8F
8E
8D
8C
8B
8A
89
88
TCON*
Timer Control Register
88H
TF1
TR1
TF0
TR0
IE1
IT1
IE0
IT0
00H
CF
CE
CD
CC
CB
CA
C9
C8
T2CON#*
Timer2 Control Register
C8H
TF2
EXF2
RCLK
TCLK
EXEN2
TR2
C/T2
CP/RL2
00H
T2MOD#
Timer2 Mode Control
C9H
-
-
-
-
-
-
T2OE
DCEN
00H
%
TH0
Timer 0 High
8CH
00H
TH1
Timer 1 High
8DH
00H
TH2
Timer 2 High
CDH
00H
TL0
Timer 0 Low
8AH
00H
TL1
Timer 1 Low
8BH
00H
TL2
Timer 2 Low
CCH
00H
TMOD
Timer 0 and 1 Mode
89H
GATE
C/T
M1
M0
GATE
C/T
M1
M0
00H
WDTRST# Watchdog Timer Reset
A6H
FFH
WDCON#
Watchdog Timer Control
8FH
-
-
-
-
-
WDPRE2 WDPRE1 WDPRE0
00H
%
Special Function Registers (Continued)
SYMBOL
DESCRIPTION
DIRECT
ADDRESS
BIT ADDRESS, SYMBOL, OR ALTERNATE PORT FUNCTION
Reset
Value
MSB
LSB
相關(guān)PDF資料
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P87C51FC-JA 80C51 8-bit microcontroller family 8K.64K/256.1K OTP/ROM/ROMless, low voltage 2.7V.5.5V, low power, high speed 33 MHz
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