80C51 8-bit microcontroller family 8KB/16KB/32KB/64K" />
參數(shù)資料
型號(hào)： P87C51RD2FBD/01,15
廠商： NXP Semiconductors
文件頁(yè)數(shù)： 30/67頁(yè)
文件大?。?/td> 0K
描述： IC 80C51 MCU 8BIT 44LQFP
標(biāo)準(zhǔn)包裝： 800
系列： 87C
核心處理器： 8051
芯體尺寸： 8-位
速度： 33MHz
連通性： EBI/EMI，UART/USART
外圍設(shè)備： POR，PWM，WDT
輸入/輸出數(shù)： 32
程序存儲(chǔ)器容量： 64KB（64K x 8）
程序存儲(chǔ)器類型： OTP
RAM 容量： 1K x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 5.5 V
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 44-LQFP
包裝： 托盤(pán)
其它名稱： 568-7909
P87C51RD2FBD/01,15-ND
Philips Semiconductors
Product data
P87C51RA2/RB2/RC2/RD2
80C51 8-bit microcontroller family 8KB/16KB/32KB/64KB OTP
with 512B/1KB RAM, low voltage (2.7 to 5.5 V), low power, high
speed (30/33 MHz)
2003 Jan 24
36
CCAPMn Address
CCAPM0
0DAH
CCAPM1
0DBH
CCAPM2
0DCH
CCAPM3
0DDH
CCAPM4
0DEH
Reset Value = X000 0000B
–
ECOMn
CAPPn
CAPNn
MATn
TOGn
PWMn
ECCFn
Not Bit Addressable
Bit:
Symbol
Function
–
Not implemented, reserved for future use*.
ECOMn
Enable Comparator. ECOMn = 1 enables the comparator function.
CAPPn
Capture Positive, CAPPn = 1 enables positive edge capture.
CAPNn
Capture Negative, CAPNn = 1 enables negative edge capture.
MATn
Match. When MATn = 1, a match of the PCA counter with this module’s compare/capture register causes the CCFn bit
in CCON to be set, flagging an interrupt.
TOGn
Toggle. When TOGn = 1, a match of the PCA counter with this module’s compare/capture register causes the CEXn
pin to toggle.
PWMn
Pulse Width Modulation Mode. PWMn = 1 enables the CEXn pin to be used as a pulse width modulated output.
ECCFn
Enable CCF interrupt. Enables compare/capture flag CCFn in the CCON register to generate an interrupt.
NOTE:
*User software should not write 1s to reserved bits. These bits may be used in future 8051 family products to invoke new features In that case, the reset or inactive
value of the new bit will be 0, and its active value will be 1. The value read from a reserved bit is indeterminate.
SU01320
7654
321
0
Figure 24. CCAPMn: PCA Modules Compare/Capture Registers
–
ECOMn
CAPPn
CAPNn
MATn
TOGn
PWMn
ECCFn
MODULE FUNCTION
X
0
No operation
X
1
0
X
16-bit capture by a positive-edge trigger on CEXn
X
0
1
0
X
16-bit capture by a negative trigger on CEXn
X
1
0
X
16-bit capture by a transition on CEXn
X
1
0
1
0
X
16-bit Software Timer
X
1
0
1
0
X
16-bit High Speed Output
X
1
0
1
0
8-bit PWM
X
1
0
1
X
0
X
Watchdog Timer
Figure 25. PCA Module Modes (CCAPMn Register)
PCA Capture Mode
To use one of the PCA modules in the capture mode either one or
both of the CCAPM bits CAPN and CAPP for that module must be
set. The external CEX input for the module (on port 1) is sampled for
a transition. When a valid transition occurs the PCA hardware loads
the value of the PCA counter registers (CH and CL) into the
module’s capture registers (CCAPnL and CCAPnH). If the CCFn bit
for the module in the CCON SFR and the ECCFn bit in the CCAPMn
SFR are set then an interrupt will be generated. Refer to Figure 26.
16-bit Software Timer Mode
The PCA modules can be used as software timers by setting both
the ECOM and MAT bits in the modules CCAPMn register. The PCA
timer will be compared to the module’s capture registers and when a
match occurs an interrupt will occur if the CCFn (CCON SFR) and
the ECCFn (CCAPMn SFR) bits for the module are both set (see
Figure 27).
High Speed Output Mode
In this mode the CEX output (on port 1) associated with the PCA
module will toggle each time a match occurs between the PCA
counter and the module’s capture registers. To activate this mode
the TOG, MAT, and ECOM bits in the module’s CCAPMn SFR must
be set (see Figure 28).
Pulse Width Modulator Mode
All of the PCA modules can be used as PWM outputs. Figure 29
shows the PWM function. The frequency of the output depends on
the source for the PCA timer. All of the modules will have the same
frequency of output because they all share the PCA timer. The duty
cycle of each module is independently variable using the module’s
capture register CCAPLn. When the value of the PCA CL SFR is
less than the value in the module’s CCAPLn SFR the output will be
low, when it is equal to or greater than the output will be high. When
CL overflows from FF to 00, CCAPLn is reloaded with the value in
CCAPHn. the allows updating the PWM without glitches. The PWM
and ECOM bits in the module’s CCAPMn register must be set to
enable the PWM mode.
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