參數(shù)資料
型號: P87C52
廠商: NXP Semiconductors N.V.
英文描述: 80C51 8-bit microcontroller family 4K/8K/16K/32K ROM/OTP 128B/256B RAM low voltage 2.7 to 5.5 V, low power, high speed 30/33 MHz
中文描述: 80C51的8位單片機系列4K/8K/16K/32K的ROM / RAM的檢察官辦公室128B/256B低電壓2.7至5.5 V,低功耗,高速33分之30兆赫
文件頁數(shù): 10/56頁
文件大?。?/td> 337K
代理商: P87C52
Philips Semiconductors
Product specification
8XC52/54/58/80C32
8XC51FA/FB/FC/80C51FA
8XC51RA+/RB+/RC+/RD+/80C51RA+
80C51 8-bit microcontroller family
8K–64K/256–1K OTP/ROM/ROMless, low voltage (2.7V–5.5V),
low power, high speed (33MHz)
1999 Apr 01
10
Table 1.
8XC52/54/58/80C32 Special Function Registers
DIRECT
ADDRESS
Accumulator
E0H
Auxiliary
8EH
Auxiliary 1
A2H
B register
F0H
Data Pointer (2 bytes)
Data Pointer High
83H
Data Pointer Low
82H
SYMBOL
DESCRIPTION
BIT ADDRESS, SYMBOL, OR ALTERNATIVE PORT FUNCTION
MSB
E7
E6
E5
E4
LPEP
3
F7
F6
F5
F4
LSB
RESET
VALUE
00H
xxxxxxx0B
xxx0xxx0B
00H
ACC*
AUXR#
AUXR1#
B*
DPTR:
DPH
DPL
E3
GF3
F3
E2
0
F2
E1
F1
E0
AO
DPS
F0
00H
00H
AF
EA
BF
B7
87
AD7
97
A7
AD15
B7
RD
AE
BE
B6
86
AD6
96
A6
AD14
B6
WR
AD
ET2
BD
PT2
B5
PT2H
85
AD5
95
A5
AD13
B5
T1
AC
ES
BC
PS
B4
PSH
84
AD4
94
A4
AD12
B4
T0
AB
ET1
BB
PT1
B3
PT1H
83
AD3
93
A3
AD11
B3
INT1
AA
EX1
BA
PX1
B2
PX1H
82
AD2
92
A2
AD10
B2
INT0
A9
ET0
B9
PT0
B1
PT0H
81
AD1
91
T2EX
A1
AD9
B1
TxD
A8
EX0
B8
PX0
B0
PX0H
80
AD0
90
T2
A0
AD8
B0
RxD
IE*
Interrupt Enable
A8H
0x000000B
IP*
Interrupt Priority
B8H
xx000000B
IPH#
Interrupt Priority High
B7H
xx000000B
P0*
Port 0
80H
FFH
P1*
Port 1
90H
FFH
P2*
Port 2
A0H
FFH
P3*
Port 3
B0H
FFH
PCON#
1
Power Control
87H
SMOD1
D7
CY
SMOD0
D6
AC
POF
2
D4
RS1
GF1
D3
RS0
GF0
D2
OV
PD
D1
IDL
D0
P
00xx0000B
D5
F0
PSW*
RCAP2H
#
RCAP2L
#
SADDR#
SADEN#
SBUF
Program Status Word
Timer 2 Capture High
Timer 2 Capture Low
Slave Address
Slave Address Mask
Serial Data Buffer
D0H
CBH
CAH
A9H
B9H
99H
000000x0B
00H
00H
00H
00H
xxxxxxxxB
9F
9E
SM1
9D
SM2
9C
REN
9B
TB8
9A
RB8
99
TI
98
RI
SCON*
SP
Serial Control
Stack Pointer
98H
81H
SM0/FE
00H
07H
8F
TF1
CF
TF2
8E
TR1
CE
EXF2
8D
TF0
CD
RCLK
8C
TR0
CC
TCLK
8B
IE1
CB
8A
IT1
CA
TR2
89
IE0
C9
C/T2
T2OE
88
IT0
C8
TCON*
Timer Control
88H
00H
T2CON*
T2MOD#
TH0
TH1
TH2#
TL0
TL1
TL2#
TMOD
SFRs are bit addressable.
SFRs are modified from or added to the 80C51 SFRs.
Reserved bits.
1. Reset value depends on reset source.
2. Bit will not be affected by Reset.
3. LPEP – Low Power OTP–EPROM only operation.
Timer 2 Control
Timer 2 Mode Control
Timer High 0
Timer High 1
Timer High 2
Timer Low 0
Timer Low 1
Timer Low 2
Timer Mode
C8H
C9H
8CH
8DH
CDH
8AH
8BH
CCH
89H
EXEN2
CP/RL2
DCEN
00H
xxxxxx00B
00H
00H
00H
00H
00H
00H
00H
GATE
C/T
M1
M0
GATE
C/T
M1
M0
*
#
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