參數(shù)資料
型號(hào)： P87C52SBAA,512
廠商： NXP Semiconductors
文件頁(yè)數(shù)： 10/38頁(yè)
文件大?。?/td> 0K
描述： IC 80C51 MCU 8K OTP 44-PLCC
產(chǎn)品培訓(xùn)模塊： Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標(biāo)準(zhǔn)包裝： 26
系列： 87C
核心處理器： 8051
芯體尺寸： 8-位
速度： 16MHz
連通性： EBI/EMI，UART/USART
外圍設(shè)備： POR
輸入/輸出數(shù)： 32
程序存儲(chǔ)器容量： 8KB（8K x 8）
程序存儲(chǔ)器類型： OTP
RAM 容量： 256 x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 5.5 V
振蕩器型： 內(nèi)部
工作溫度： 0°C ~ 70°C
封裝/外殼： 44-LCC（J 形引線）
包裝： 管件
產(chǎn)品目錄頁(yè)面： 705 (CN2011-ZH PDF)
其它名稱： 568-1247-5
935252870512
P87C52SBAA
Philips Semiconductors
Product specification
80C51/87C51/80C52/87C52
80C51 8-bit microcontroller family
4 K/8 K OTP/ROM low voltage (2.7 V–5.5 V),
low power, high speed (33 MHz), 128/256 B RAM
2000 Aug 07
18
Interrupt Priority Structure
The 80C51/87C51 and 80C52/87C52 have a 6-source four-level
interrupt structure. They are the IE, IP and IPH. (See Figures 10, 11,
and 12.) The IPH (Interrupt Priority High) register that makes the
four-level interrupt structure possible. The IPH is located at SFR
address B7H. The structure of the IPH register and a description of
its bits is shown in Figure 12.
The function of the IPH SFR is simple and when combined with the
IP SFR determines the priority of each interrupt. The priority of each
interrupt is determined as shown in the following table:
PRIORITY BITS
INTERRUPT PRIORITY LEVEL
IPH.x
IP.x
INTERRUPT PRIORITY LEVEL
0
Level 0 (lowest priority)
0
1
Level 1
1
0
Level 2
1
Level 3 (highest priority)
An interrupt will be serviced as long as an interrupt of equal or
higher priority is not already being serviced. If an interrupt of equal
or higher level priority is being serviced, the new interrupt will wait
until it is finished before being serviced. If a lower priority level
interrupt is being serviced, it will be stopped and the new interrupt
serviced. When the new interrupt is finished, the lower priority level
interrupt that was stopped will be completed.
Table 7.
Interrupt Table
SOURCE
POLLING PRIORITY
REQUEST BITS
HARDWARE CLEAR?
VECTOR ADDRESS
X0
1
IE0
N (L)1
Y (T)2
03H
T0
2
TP0
Y
0BH
X1
3
IE1
N (L)
Y (T)
13H
T1
4
TF1
Y
1BH
SP
5
RI, TI
N
23H
T2
6
TF2, EXF2
N
2BH
NOTES:
1. L = Level activated
2. T = Transition activated
EX0
IE (0A8H)
Enable Bit = 1 enables the interrupt.
Enable Bit = 0 disables it.
BIT
SYMBOL
FUNCTION
IE.7
EA
Global disable bit. If EA = 0, all interrupts are disabled. If EA = 1, each interrupt can be individually
enabled or disabled by setting or clearing its enable bit.
IE.6
—
Not implemented. Reserved for future use.
IE.5
ET2
Timer 2 interrupt enable bit.
IE.4
ES
Serial Port interrupt enable bit.
IE.3
ET1
Timer 1 interrupt enable bit.
IE.2
EX1
External interrupt 1 enable bit.
IE.1
ET0
Timer 0 interrupt enable bit.
IE.0
EX0
External interrupt 0 enable bit.
SU00571
ET0
EX1
ET1
ES
ET2
—
EA
0
1
2
3
4
5
6
7
Figure 10. IE Registers
相關(guān)PDF資料
PDF描述
MC68HC908EY16MFA MCU 8-BIT 16K FLASH 32-LQFP
MC68HC11K1CFUE4 MCU 8-BIT 768 RAM 4MHZ 80-QFP
MC68HC11K1CFUE3 MCU 8-BIT 768 RAM 3MHZ 80-QFP
MC9S08AW16MFDE IC MCU 8BIT 16K FLASH 48-QFN
MC68HC11K1CFNE4R MCU 8-BIT 768 RAM 4MHZ 84-PLCC
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
P87C52SBAA-T 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller
P87C52SBBB 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit CMOS (low voltage, low power and high speed) microcontroller families
P87C52SBBB,557 功能描述:8位微控制器 -MCU 80C51 8K/256 OTP 16MHZ RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
P87C52SBBB557 制造商:Rochester Electronics LLC 功能描述: 制造商:NXP 功能描述: 制造商:NXP Semiconductors 功能描述:
P87C52SBBB-S 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*