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參數(shù)資料
| 型號(hào)： | P87C661X2 |
| 英文描述： | 80C51 8-bit microcontroller family 16KB OTP/ROM. 512B RAM low voltage (2.7 to 5.5 V). low power. high speed (30/33 MHZ). two 400KB I2C interfaces |
| 中文描述： | 80C51的8位單片機(jī)系列16KB的檢察官辦公室/光盤(pán)。 512B RAM的低電壓（2.7至5.5 V）。低功耗。高速（三十三分之三十兆赫）。 2 400KB I2C接口 |
| 文件頁(yè)數(shù)： | 33/102頁(yè) |
| 文件大小： | 568K |
| 代理商： | P87C661X2 |
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Philips Semiconductors
Product data
P8xC660X2/661X2
80C51 8-bit microcontroller family
16 KB OTP/ROM, 512B
RAM, low voltage (2.7 to 5.5 V), low power, high speed (30/33
MHz), two 400KB I
2
C interfaces
2003 Oct 02
33
SIO1 Implementation and Operation:
Figure 17 shows how the
on-chip I
2
C bus interface is implemented, and the following text
describes the individual blocks.
I
NPUT
F
ILTERS
AND
O
UTPUT
S
TAGES
The input filters have I
2
C compatible input levels. If the input voltage
is less than 1.5 V, the input logic level is interpreted as 0; if the input
voltage is greater than 3.0 V, the input logic level is interpreted as 1.
Input signals are synchronized with the internal clock (f
OSC
/4), and
spikes shorter than three oscillator periods are filtered out.
The output stages consist of open drain transistors that can sink
3 mA at V
OUT
< 0.4 V. These open drain outputs do not have
clamping diodes to V
DD
. Thus, if the device is connected to the I
2
C
bus and V
DD
is switched off, the I
2
C bus is not affected.
A
DDRESS
R
EGISTER,
S
1
ADR
This 8-bit special function register may be loaded with the 7-bit slave
address (7 most significant bits) to which SIO1 will respond when
programmed as a slave transmitter or receiver. The LSB (GC) is
used to enable general call address (00H) recognition.
C
OMPARATOR
The comparator compares the received 7-bit slave address with its
own slave address (7 most significant bits in S1ADR). It also
compares the first received 8-bit byte with the general call address
(00H). If an equality is found, the appropriate status bits are set and
an interrupt is requested.
S
HIFT
R
EGISTER,
S
1
DAT
This 8-bit special function register contains a byte of serial data to
be transmitted or a byte which has just been received. Data in
S1DAT is always shifted from right to left; the first bit to be
transmitted is the MSB (bit 7) and, after a byte has been received,
the first bit of received data is located at the MSB of S1DAT. While
data is being shifted out, data on the bus is simultaneously being
shifted in; S1DAT always contains the last byte present on the bus.
Thus, in the event of lost arbitration, the transition from master
transmitter to slave receiver is made with the correct data in S1DAT.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| P87C661X2BBD | 功能描述:8位微控制器 -MCU 16K/512B OTP 12/6 CLK I2CX2 RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| P87C661X2BBD,157 | 功能描述:8位微控制器 -MCU P87C661X2BBD/LQFP44/TRAYBM// RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| P87C661X2FA,529 | 功能描述:8位微控制器 -MCU P87C661X2FA/PLCC44/TUBESMDP// RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| P87C661X2FA-S | 功能描述:8位微控制器 -MCU 16K/512B OTP 12/6 CLK I2CX2 RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| P87C695AER/C1 | 制造商:NXP Semiconductors 功能描述: 制造商:NXP Semiconductors 功能描述:Electronic Component |
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