參數資料
型號: P89LPC906FD,112
廠商: NXP Semiconductors
文件頁數: 51/51頁
文件大?。?/td> 0K
描述: IC 80C51 MCU FLASH 1K 8-SOIC
產品培訓模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標準包裝: 1
系列: LPC900
核心處理器: 8051
芯體尺寸: 8-位
速度: 18MHz
外圍設備: 欠壓檢測/復位,LED,POR,WDT
輸入/輸出數: 6
程序存儲器容量: 1KB(1K x 8)
程序存儲器類型: 閃存
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 2.4 V ~ 3.6 V
振蕩器型: 內部
工作溫度: -40°C ~ 85°C
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
包裝: 剪切帶 (CT)
配用: 622-1006-ND - SOCKET ADAPTER BOARD
568-1759-ND - EMULATOR DEBUGGER/PROGRMMR LPC9X
其它名稱: 568-1997-1
Philips Semiconductors
P89LPC906/907/908
8-bit microcontrollers with two-clock 80C51 core
Product data
Rev. 05 — 17 December 2004
9 of 51
9397 750 14467
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
P3.0 to P3.1
I/O
Port 3: Port 3 is an I/O port with a user-congurable output types. During reset Port 3
latches are congured in the input only mode with the internal pull-up disabled. The
operation of port 3 pins as inputs and outputs depends upon the port conguration
selected. Each port pin is congured independently. Refer to Section 8.11.1 “Port
All pins have Schmitt triggered inputs.
Port 3 also provides various special functions as described below:
5
I/O
P3.0 — Port 3 bit 0.
O
XTAL2 — Output from the oscillator amplier (when a crystal oscillator option is
selected via the FLASH conguration).
O
CLKOUT — CPU clock divided by 2 when enabled via SFR bit (ENCLK to TRIM.6). It
can be used if the CPU clock is the internal RC oscillator, Watchdog oscillator or
external clock input, except when XTAL1/XTAL2 are used to generate clock source
for the real time clock/system timer.
4
I/O
P3.1 — Port 3 bit 1.
I
XTAL1 — Input to the oscillator circuit and internal clock generator circuits (when
selected via the FLASH conguration). It can be a port pin if internal RC oscillator or
Watchdog oscillator is used as the CPU clock source, and if XTAL1/XTAL2 are not
used to generate the clock for the real time clock/system timer.
VSS
2I
Ground: 0 V reference.
VDD
6I
Power Supply: This is the power supply voltage for normal operation as well as Idle
and Power-down modes.
Table 3:
P89LPC906 pin description…continued
Symbol
Pin
Type
Description
Table 4:
P89LPC907 pin description
Symbol
Pin
Type
Description
P0.4 to P0.6
I/O
Port 0: Port 0 is an I/O port with a user-congurable output type. During reset Port 0
latches are congured in the input only mode with the internal pull-up disabled. The
operation of Port 0 pins as inputs and outputs depends upon the port conguration
selected. Each port pin is congured independently. Refer to Section 8.11.1 “Port
The Keypad Interrupt feature operates with Port 0 pins.
All pins have Schmitt triggered inputs.
Port 0 also provides various special functions as described below:
8
I/O
P0.4 — Port 0 bit 4.
I
CIN1A — Comparator positive input.
I
KBI4 — Keyboard input 4.
7
I/O
P0.5 — Port 0 bit 5.
I
CMPREF — Comparator reference (negative) input.
I
KBI5 — Keyboard input 5.
3
I/O
P0.6 — Port 0 bit 6.
O
CMP1 — Comparator 1 output.
I
KBI6 — Keyboard input 6.
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