參數(shù)資料
型號(hào): P89LPC9321FDH,518
廠(chǎng)商: NXP Semiconductors
文件頁(yè)數(shù): 22/71頁(yè)
文件大小: 0K
描述: IC 80C51 MCU FLASH 8K 28-TSSOP
標(biāo)準(zhǔn)包裝: 1
系列: LPC900
核心處理器: 8051
芯體尺寸: 8-位
速度: 18MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 26
程序存儲(chǔ)器容量: 8KB(8K x 8)
程序存儲(chǔ)器類(lèi)型: 閃存
EEPROM 大?。?/td> 512 x 8
RAM 容量: 768 x 8
電壓 - 電源 (Vcc/Vdd): 2.4 V ~ 3.6 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-TSSOP(0.173",4.40mm 寬)
包裝: 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁(yè)面: 706 (CN2011-ZH PDF)
配用: 568-4000-ND - DEMO BOARD SPI/I2C TO DUAL UART
568-3510-ND - DEMO BOARD SPI/I2C TO UART
622-1003-ND - KIT FOR LCD DEMO
568-1759-ND - EMULATOR DEBUGGER/PROGRMMR LPC9X
568-1758-ND - BOARD EVAL FOR LPC93X MCU FAMILY
其它名稱(chēng): 568-4699-6
P89LPC9321
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 16 November 2010
29 of 71
NXP Semiconductors
P89LPC9321
8-bit microcontroller with accelerated two-clock 80C51 core
7.17.1 Brownout detection
The brownout detect function determines if the power supply voltage drops below a
certain level. Enhanced brownout detection has 3 independent functions: BOD reset,
BOD interrupt and BOD EEPROM/FLASH.
BOD reset is always on except in total power-down mode. It could not be disabled in
software. BOD interrupt may be enabled or disabled in software. BOD EEPROM/FLASH
is always on, except in power-down modes and could not be disabled in software.
BOD reset and BOD interrupt, each has four trip voltage levels. BOE1 bit (UCFG1.5) and
BOE0 bit (UCFG1.3) are used as trip point configuration bits of BOD reset. BOICFG1 bit
and BOICFG0 bit in register BODCFG are used as trip point configuration bits of BOD
interrupt. BOD reset voltage should be lower than BOD interrupt trip point. BOD
EEPROM/FLASH is used for flash/Data EEPROM programming/erase protection and has
only 1 trip voltage of 2.4 V. Please refer to P89LPC9321 User manual for detail
configurations.
If brownout detection is enabled the brownout condition occurs when VDD falls below the
brownout trip voltage and is negated when VDD rises above the brownout trip voltage.
For correct activation of brownout detect, the VDD rise and fall times must be observed.
Please see Table 10 “Static characteristics” for specifications.
7.17.2 Power-on detection
The Power-on detect has a function similar to the brownout detect, but is designed to work
as power comes up initially, before the power supply voltage reaches a level where
brownout detect can work. The POF flag in the RSTSRC register is set to indicate an
initial power-up condition. The POF flag will remain set until cleared by software.
7.18 Power reduction modes
The P89LPC9321 supports three different power reduction modes. These modes are Idle
mode, Power-down mode, and total Power-down mode.
7.18.1 Idle mode
Idle mode leaves peripherals running in order to allow them to activate the processor
when an interrupt is generated. Any enabled interrupt source or reset may terminate Idle
mode.
7.18.2 Power-down mode
The Power-down mode stops the oscillator in order to minimize power consumption. The
P89LPC9321 exits Power-down mode via any reset, or certain interrupts. In Power-down
mode, the power supply voltage may be reduced to the data retention supply voltage
VDDR. This retains the RAM contents at the point where Power-down mode was entered.
SFR contents are not guaranteed after VDD has been lowered to VDDR, therefore it is
highly recommended to wake-up the processor via reset in this case. VDD must be raised
to within the operating range before the Power-down mode is exited.
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