參數(shù)資料
型號: P89LPC932A1FA,112
廠商: NXP Semiconductors
文件頁數(shù): 62/64頁
文件大?。?/td> 0K
描述: IC 80C51 MCU FLASH 8K 28-PLCC
產(chǎn)品培訓(xùn)模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標(biāo)準(zhǔn)包裝: 37
系列: LPC900
核心處理器: 8051
芯體尺寸: 8-位
速度: 18MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,LED,POR,PWM,WDT
輸入/輸出數(shù): 26
程序存儲器容量: 8KB(8K x 8)
程序存儲器類型: 閃存
RAM 容量: 768 x 8
電壓 - 電源 (Vcc/Vdd): 2.4 V ~ 3.6 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-PLCC
包裝: 管件
產(chǎn)品目錄頁面: 706 (CN2011-ZH PDF)
配用: DB-TSSOP-LPC932-ND - BOARD FOR LPC932 TSSOP
622-1014-ND - BOARD FOR LPC9XX TSSOP
622-1008-ND - BOARD FOR LPC9103 10-HVSON
622-1006-ND - SOCKET ADAPTER BOARD
568-4000-ND - DEMO BOARD SPI/I2C TO DUAL UART
568-3510-ND - DEMO BOARD SPI/I2C TO UART
622-1003-ND - KIT FOR LCD DEMO
622-1002-ND - USB IN-CIRCUIT PROG LPC9XX
568-1759-ND - EMULATOR DEBUGGER/PROGRMMR LPC9X
568-1758-ND - BOARD EVAL FOR LPC93X MCU FAMILY
其它名稱: 568-4279-5
935276131112
P89LPC932A1FA
P89LPC932A1_3
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 12 March 2007
7 of 64
NXP Semiconductors
P89LPC932A1
8-bit microcontroller with accelerated two-clock 80C51 core
6.2 Pin description
Fig 6.
P89LPC932A1 DIP28 pin conguration
P89LPC932A1FN
002aac785
1
2
3
4
5
6
7
8
9
10
11
12
13
14
16
15
18
17
20
19
22
21
24
23
26
25
28
27
P2.0/ICB
P2.1/OCD
P0.0/CMP2/KBI0
P1.7/OCC
P1.6/OCB
P1.5/RST
VSS
P3.1/XTAL1
P3.0/XTAL2/CLKOUT
P1.4/INT1
P1.3/INT0/SDA
P1.2/T0/SCL
P2.2/MOSI
P2.3/MISO
P2.7/ICA
P2.6/OCA
P0.1/CIN2B/KBI1
P0.2/CIN2A/KBI2
P0.3/CIN1B/KBI3
P0.4/CIN1A/KBI4
P0.5/CMPREF/KBI5
VDD
P0.6/CMP1/KBI6
P0.7/T1/KBI7
P1.0/TXD
P1.1/RXD
P2.5/SPICLK
P2.4/SS
Table 2.
Pin description
Symbol
Pin
Type Description
TSSOP28,
PLCC28,
DIP28
HVQFN28
P0.0 to P0.7
I/O
Port 0: Port 0 is an 8-bit I/O port with a user-congurable output type.
During reset Port 0 latches are congured in the input only mode with the
internal pull-up disabled. The operation of Port 0 pins as inputs and
outputs depends upon the port conguration selected. Each port pin is
congured independently. Refer to Section 7.13.1 “Port congurations”
The Keypad Interrupt feature operates with Port 0 pins.
All pins have Schmitt trigger inputs.
Port 0 also provides various special functions as described below:
P0.0/CMP2/
KBI0
3
27
I/O
P0.0 — Port 0 bit 0.
O
CMP2 — Comparator 2 output.
I
KBI0 — Keyboard input 0.
P0.1/CIN2B/
KBI1
26
22
I/O
P0.1 — Port 0 bit 1.
I
CIN2B — Comparator 2 positive input B.
I
KBI1 — Keyboard input 1.
P0.2/CIN2A/
KBI2
25
21
I/O
P0.2 — Port 0 bit 2.
I
CIN2A — Comparator 2 positive input A.
I
KBI2 — Keyboard input 2.
P0.3/CIN1B/
KBI3
24
20
I/O
P0.3 — Port 0 bit 3.
I
CIN1B — Comparator 1 positive input B.
I
KBI3 — Keyboard input 3.
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