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參數(shù)資料
| 型號(hào)： | P89LPC970FDH,129 |
| 廠商： | NXP Semiconductors |
| 文件頁(yè)數(shù)： | 39/66頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | MCU 80C51 2KB FLASH 20TSSOP |
| 標(biāo)準(zhǔn)包裝： | 75 |
| 系列： | LPC900 |
| 核心處理器： | 8051 |
| 芯體尺寸： | 8-位 |
| 速度： | 18MHz |
| 連通性： | I²C，SPI，UART/USART |
| 外圍設(shè)備： | 欠壓檢測(cè)/復(fù)位，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 18 |
| 程序存儲(chǔ)器容量： | 2KB（2K x 8） |
| 程序存儲(chǔ)器類(lèi)型： | 閃存 |
| RAM 容量： | 256 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.4 V ~ 5.5 V |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬） |
| 包裝： | 管件 |
| 其它名稱(chēng)： | 568-8747-5 P89LPC970FDH,129-ND |
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P89LPC97X
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 3 — 8 June 2010
44 of 66
NXP Semiconductors
P89LPC970/971/972
8-bit microcontroller with accelerated two-clock 80C51 core
Remark: Users who wish to use this loader should take precautions to avoid erasing the
1 kB sector that contains this bootloader. Instead, the page erase function can be used to
erase the first eight 64-byte pages located in this sector.
A custom bootloader can be written with the Boot Vector set to the custom bootloader, if
desired.
7.29.10 Hardware activation of the bootloader
The bootloader can also be executed by forcing the device into ISP mode during a
power-on sequence (see the P89LPC970/971/972 User manual for specific information).
This has the same effect as having a non-zero status byte. This allows an application to
be built that will normally execute user code but can be manually forced into ISP
operation. If the factory default setting for the boot is changed, it will no longer point to the
factory pre-programmed ISP bootloader code. After programming the flash, the status
byte should be programmed to zero in order to allow execution of the user’s application
code beginning at address 0000H.
7.30 User configuration bytes
Some user-configurable features of the P89LPC970/971/972 must be defined at power-up
and therefore cannot be set by the program after start of execution. These features are
configured through the use of the flash byte UCFG1 and UCFG2. Please see the
P89LPC970/971/972 User Manual for additional details.
7.31 User sector security bytes
There are four/eight User Sector Security Bytes on the P89LPC970/971/972. Each byte
corresponds to one sector. Please see the P89LPC970/971/972 User manual for
additional details.
Table 9.
Default boot vector values and ISP entry points
Device
Default
boot vector
Default
bootloader
entry point
Default bootloader
code range
1 kB sector
range
P89LPC970
07H
0700H
0600H to 07FFH
0400H to 07FFH
P89LPC971
0FH
0F00H
0E00H to 1FFFH
0C00H to 0FFFH
P89LPC972
1FH
1F00H
1E00H to 1FFFH
1C00H to 1FFFH
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| P89LPC971 | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core 2 kB/4 kB/8 kB wide-voltage byte-erasable flash |
| P89LPC971FDH | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core 2 kB/4 kB/8 kB wide-voltage byte-erasable flash |
| P89LPC971FDH,129 | 功能描述:8位微控制器 -MCU MCU 80C51 4KB FLASH RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| P89LPC971FDH129 | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core 2 kB/4 kB/8 kB wide-voltage byte-erasable flash |
| P89LPC972 | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core 2 kB/4 kB/8 kB wide-voltage byte-erasable flash |
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