1999 Mar 12
51
Philips Semiconductors
Product specification
8-bit microcontroller
P8xC557E8
17 RESET CIRCUITRY
The reset input pin RSTIN is connected to a Schmitt
Trigger for noise reduction (see Fig.20). If the HF oscillator
is selected, a reset is accomplished by holding the RSTIN
pin HIGH for at least 2 machine cycles (24 system clock
periods). If the PLL oscillator is selected the RSTIN pulse
must have a width of at least 1
μ
s, independent of the
32 kHz-oscillator running or not (see PLL description).
The CPU responds by executing an internal reset.
The RSTOUT pin represents the signal resetting the CPU
and can be used to reset peripheral devices.
The RSTOUT level also could be high due to a Watchdog
timer overflow.The length of the output pulse from T3 is
three machine cycles. A pulse of such short duration is
necessary in order to recover from a processor or system
fault as fast as possible. During reset, ALE and PSEN
output a HIGH level. In order to perform a correct reset,
this level must not be affected by external elements.
A reset leaves the internal registers as shown in
Chapter 18. The internal RAM is not affected by reset.
At power-on, the RAM content is indeterminate.
17.1
Power-on-reset
An automatic reset can be obtained by switching on V
DD
,
if the RSTIN pin is connected to V
DD
via a capacitor, as
shown in Figure 21. Is the HF oscillator selected the V
DD
rise time must not exceed 10 ms and the capacitor should
be at least 2.2
μ
F. The decrease of the RSTIN pin voltage
depends on the capacitor and the internal resistor R
RST
.
That voltage must remain above the lower threshold for at
minimum the HF oscillator start-up time plus 2 machine
cycles. If the PLL oscillator is selected, a 0.1
μ
F capacitor
is sufficient to obtain an automatic reset.
Fig.20 On-chip reset configuration.
handbook, full pagewidth
MBH087
Schmitt
trigger
PLL
OSCILLATOR
MUX
RSTOUT
internal
reset
overflow
timer T3
RRST
RSTIN
SELXTAL1
on-chip
resistor
Fig.21 Power-on-reset.
handbook, halfpage
VDD
RSTIN
C
RRST
MHI026
P8xC557E8
(1)