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參數(shù)資料
| 型號： | PACNLT101 |
| 廠商： | California Micro Devices Corporation |
| 英文描述： | NON-LINEAR HIGH SPEED TERMINATION IC |
| 中文描述： | 非線性終止高速集成電路 |
| 文件頁數(shù)： | 3/5頁 |
| 文件大?。?/td> | 74K |
| 代理商： | PACNLT101 |
3/8/2001
3
215 Topaz Street, Milpitas, California 95035
Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com
PACNLT101
2001 California Micro Devices Corp. All rights reserved. EZterm
is a trademark of California Micro Devices
Figure 1. DC I-V Curves for V
DD
= 2V and V
DD
= 3.3V
Application Information
Figure 2 shows one method of configuring the printed
circuit board such that all 16 terminated signals are
easily accessible. The decoupling capacitor should be a
high-frequency type, 0.1μF or larger, and placed as close
to the IC as possible. This will minimize
the positive overshoot voltage and also reduce
EMI emissions. It should be noted that for optimum
performance the PACNLT101 termination should be
located as physically close to the receiving IC input as is
possible.
Figure 2. Printed Circuit Board with Accessible Configuration for 16 Terminated Signals
0
5
10
15
20
25
30
35
40
45
50
0
100
200
300
400
500
600
Voltage above V
DD
(mV)
C
VDD = 3.3V
VDD = 2.0V
1
2
3
4
0.1μF
GND
via
24
23
22
21
V
DD
5
20
6
19
7
18
8
17
9
16
10
15
11
14
GND
GND
GND
PACNLT101
16
Terminated
Signals
12
13
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