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參數(shù)資料
| 型號： | PALCE22V10H-10PI/5 |
| 廠商： | LATTICE SEMICONDUCTOR CORP |
| 元件分類： | PLD |
| 英文描述： | 24-Pin EE CMOS (Zero Power) Versatile PAL Device |
| 中文描述： | EE PLD, 10 ns, PDIP24 |
| 封裝： | 0.300 INCH, SKINNY, PLASTIC, DIP-24 |
| 文件頁數(shù)： | 3/34頁 |
| 文件大?。?/td> | 691K |
| 代理商： | PALCE22V10H-10PI/5 |
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PALCE22V10H-7 (Com’l)
11
CAPACITANCE 1
Note:
1. These parameters are not 100% tested, but are evaluated at initial characterization and at any time the design is modied where
capacitance may be affected.
Notes:
1. See “Switching Test Circuit” for test conditions.
2. Skew is measured with all outputs switching in the same direction.
3. These parameters are not 100% tested, but are calculated at initial characterization and at any time the design is modied where
frequency may be affected.
4. tCF is a calculated value and is not guaranteed. tCF can be found using the following equation:
tCF = 1/fMAX (internal feedback) - tS.
Parameter
Symbol
Parameter Description
Test Conditions
Typ
Unit
CIN
Input Capacitance
VIN = 2.0 V
VCC = 5.0 V
TA = 25°C
f = 1 MHz
5
pF
COUT
Output Capacitance
VOUT = 2.0 V
8
SWITCHING CHARACTERISTICS OVER COMMERCIAL OPERATING RANGES 1
Parameter
Symbol
Parameter Description
-7
Unit
PDIP
PLCC
Min
Max
Min
Max
tPD
Input or Feedback to Combinatorial Output
3
7.5
3
7.5
ns
tS1
Setup Time from Input or Feedback
5
4.5
ns
tS2
Setup Time from SP to Clock
6
ns
tH
Hold Time
0
ns
tCO
Clock to Output
2
5
2
4.5
ns
tSKEWR
Skew Between Registered Outputs (Note 2)
1
ns
tAR
Asynchronous Reset to Registered Output
10
ns
tARW
Asynchronous Reset Width
7
ns
tARR
Asynchronous Reset Recovery Time
7
ns
tSPR
Synchronous Preset Recovery Time
7
ns
tWL
Clock Width
LOW
3.5
3.0
ns
tWH
HIGH
3.5
3.0
ns
fMAX
Maximum Frequency
(Note 3)
External Feedback
1/(tS + tCO)
100
111
MHz
Internal Feedback
(fCNT)
1/(tS + tCF) (Note 4)
125
133
MHz
No Feedback
1/(tWH + tWL)
142.8
166
MHz
tEA
Input to Output Enable Using Product Term Control
7.5
ns
tER
Input to Output Disable Using Product Term Control
7.5
ns
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| PALCE22V10H-10SC/5 | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:24-Pin EE CMOS (Zero Power) Versatile PAL Device |
| PALCE22V10H10ZC/5 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ASIC |
| PALCE22V10H-15/B3A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Electrically-Erasable PLD |
| PALCE22V10H-15/BKA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Electrically-Erasable PLD |
| PALCE22V10H-15/BLA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Electrically-Erasable PLD |
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