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參數(shù)資料
| 型號： | PALCE22V10H-15JC/4 |
| 廠商： | LATTICE SEMICONDUCTOR CORP |
| 元件分類： | PLD |
| 英文描述： | 24-Pin EE CMOS (Zero Power) Versatile PAL Device |
| 中文描述： | EE PLD, 15 ns, PQCC28 |
| 封裝： | PLASTIC, LCC-28 |
| 文件頁數(shù)： | 34/34頁 |
| 文件大?。?/td> | 691K |
| 代理商： | PALCE22V10H-15JC/4 |
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PALCE22V10H-5 (Com’l)
9
CAPACITANCE 1
Note:
1. These parameters are not 100% tested, but are evaluated at initial characterization and at any time the design is modied where
capacitance may be affected.
Notes:
1. See “Switching Test Circuit” for test conditions.
2. Skew is measured with all outputs switching in the same direction.
3. These parameters are not 100% tested, but are calculated at initial characterization and at any time the design is modied where
frequency may be affected.
4. tCF is a calculated value and is not guaranteed. tCF can be found using the following equation:
tCF = 1/fMAX (internal feedback) - tS.
Parameter
Symbol
Parameter Description
Test Conditions
Typ
Unit
CIN
Input Capacitance
VIN = 2.0 V
VCC = 5.0 V
TA = 25°C
f = 1 MHz
5
pF
COUT
Output Capacitance
VOUT = 2.0 V
8
SWITCHING CHARACTERISTICS OVER COMMERCIAL OPERATING RANGES 1
Parameter
Symbol
Parameter Description
-5
Unit
Min
Max
tPD
Input or Feedback to Combinatorial Output
5
ns
tS1
Setup Time from Input or Feedback
3
ns
tS2
Setup Time from SP to Clock
4
ns
tH
Hold Time
0
ns
tCO
Clock to Output
4ns
tSKEWR
Skew Between Registered Outputs (Note 2)
0.5
ns
tAR
Asynchronous Reset to Registered Output
7.5
ns
tARW
Asynchronous Reset Width
4.5
ns
tARR
Asynchronous Reset Recovery Time
4.5
ns
tSPR
Synchronous Preset Recovery Time
4.5
ns
tWL
Clock Width
LOW
2.5
ns
tWH
HIGH
2.5
ns
fMAX
Maximum Frequency (Note 3)
External Feedback
1/(tS + tCO)
142.8
MHz
Internal Feedback (fCNT)
1/(tS + tCF) (Note 4)
150
MHz
No Feedback
1/(tWH + tWL)
200
MHz
tEA
Input to Output Enable Using Product Term Control
6
ns
tER
Input to Output Disable Using Product Term Control
5.5
ns
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PALCE22V10H-15JI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Electrically-Erasable PLD |
| PALCE22V10H-15JI/4 | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:24-Pin EE CMOS (Zero Power) Versatile PAL Device |
| PALCE22V10H-15JI/5 | 制造商:Lattice Semiconductor Corporation 功能描述: |
| PALCE22V10H-15PC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Electrically-Erasable PLD |
| PALCE22V10H-15PC/4 | 制造商:Advanced Micro Devices 功能描述:Simple E2PLD, Programmable Array Logic, 24 Pin, Plastic, DIP |
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