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3
PBL 385 41
Electrical Characterisics
At T
Amb
= + 25
°
C. No cable and line rectifier unless otherwise specified.
Ref.
fig.
Parameter
Conditions
Min
Typ
Max
Unit
Line voltage, V
L
2
2
I
L
= 15 mA
I
= 100 mA
20
10
log (V
2
/ V
3
); 1 kHz
R
L
= 0
R
L
= 400
R
= 900
- 2.2 k
1 kHz, R
L
= 0 to 900
3.3
11
3.7
13
4.1
15
V
V
Transmitting gain, note 1
2
2
2
2
41
43.5
46
3
43
45.5
48
5
45
47.5
50
7
dB
dB
dB
dB
Transmitting range of
regulation
Transmitting frequency
response
Transmitter input impedance, pin 3
Microphone input impedance
Transmitter dynamic output 2 200 Hz - 3.4 kHz
≤
2% distortion, I
L
= 20 - 100 mA
Transmitter max output 2 200 Hz - 3.4 kHz
I
= 0 - 100 mA, V
= 0 - 1 V
Transmitter output noise 2
Receiving gain, note 1
2
2
2
Receiving range of regulation
2
Receiving frequency response
2
Receiver input impedance
2
Receiver output impedance
2
Receiver dynamic output
2
note 2
Receiver max output
3
2
200 Hz to 3.4 kHz
-1
1
dB
2
2
1 kHz
13.5
1.7//(2.7) note 3
1.5 V
p
17
20.5
k
k
3 V
p
Psoph-weighting, Rel 1 V
rms
, R
L
= 0
20
10
log (V
/ V
); 1 kHz
R
L
= 0
-18.5 -16.5 -14.5 dB
R
L
= 400
R
= 900
- 2.2 k
-13.5 -11.5 -9.5
1 kHz, R
= 0 to 900
3
200 Hz to 3.4 kHz
-1
1 kHz,
1 kHz,
200 Hz - 3.4 kHz
≤
2% distortion, I
= 20 - 100 mA
Measured with line rectifier
200 Hz - 3.4 kHz, I
L
= 0 - 100 mA,
V
= 0 - 50 V
A-weighting, Rel 1V
rms
, with cable
0 - 3 km, = 0.4 mm
-75
dB
Psoph
-16 -14 -12
dB
dB
dB
dB
k
V
p
5
7
1
38
3(+310)note 3
0.5
0.9
V
p
Receiver output noise
2
-85
dB
A
0 - 5 km, = 0.5 mm,
Mute input voltage 2
at mute (active low)
DC
-supply voltage
Pin 9
DC
-supply voltage
Pin 8
0.3 V
2
I
L
= 20 - 100 mA
R
= 4k; I
=2 mA
I
L
= 20 - 100 mA
I
DC
= 0 mA
I
DC
= 2 mA
V
DC
= 2.35 V
3.4
3.7
4.0
V
2
2.1
1.95
2.35
2.2
0.1
2.6
2.6
μ
A
V
V
DC-output pin 8 input
leakage current (no supply)
DTMF transmitting gain
DTMF input impedance
4
2
2
V
= 0.3 V, 1 kHz
1 kHz
24.5
20
26.5
25
28.5
30
dB
k
Notes
1. Adjustable to both higher and lower values with external components.
2. The dynamic output can be doubled, see applications information.
3. External resistor in the test set up.
4. The DC output voltage is reduced at low line voltage (see page 8).