參數(shù)資料
型號： PC7447MGH933N
廠商： Atmel Corp.
英文描述： PowerPC 7457 RISC Microprocessor
中文描述： 7457的PowerPC RISC微處理器
文件頁數(shù)： 13/66頁
文件大?。?/td> 522K
代理商： PC7447MGH933N
13
PC7457/47 [Preliminary]
5345B–HIREL–02/04
The PC7457 provides several I/O voltages to support both compatibility with existing
systems and migration to future systems. The PC7457 core voltage must always be pro-
vided at nominal 1.3V (see Table 3 for actual recommended core voltage). Voltage to
the L3 I/Os and processor interface I/Os are provided through separate sets of supply
pins and may be provided at the voltages shown in Table 4. The input voltage threshold
for each bus is selected by sampling the state of the voltage select pins at the negation
of the signal HRESET. The output voltage will swing from GND to the maximum voltage
applied to the OV
DD
or GV
DD
power pins.
Notes:
1. Not implemented on PC7447.
2. Caution: The input threshold selection must agree with the OV
DD
/GV
DD
voltages sup-
plied. See notes in Table 2.
3. If used, pull-down resistors should be less than 250
4. Applicable to L3 bus interface only. HRESET is the inverse of HRESET.
5. 1.8V I/O mode and 1.5V I/O mode are not supported in N spec at V
DD
= 1.1V.
Thermal Characteristics
Package Characteristics
Notes:
1. See “Thermal Management Information” on page 15 for more details about thermal management.
2. Junction temperature is a function of on-chip power dissipation, package thermal resistance, mounting site (board) tempera-
ture, ambient temperature, airflow, power dissipation of other components on the board, and board thermal resistance.
3. Per SEMI G38-87 and JEDEC JESD51-2 with the single-layer board horizontal.
4. Per JEDEC JESD51-6 with the board horizontal.
5. Thermal resistance between the die and the printed-circuit board per JEDEC JESD51-8. Board temperature is measured on
the top surface of the board near the package.
6. Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883
Method 1012.1) with the calculated case temperature. The actual value of R
θ
JC
for the part is less than 0.1
°
C/W.
Table 4.
Input Threshold Voltage Setting
BVSEL
Signal
Processor Bus Input
Threshold is Relative to:
L3VSEL
Signal
(1)
L3 Bus Input Threshold
is Relative to:
Notes
0
1.8V
0
1.8V
(2)(3)(5)
HRESET
Not available
HRESET
1.5V
(2)(4)(5)
HRESET
2.5V
HRESET
2.5V
(2)
1
2.5V
1
2.5V
(2)
Table 5.
Package Thermal Characteristics
(1)
Symbol
Characteristic
Value
Unit
°
C/W
°
C/W
°
C/W
°
C/W
°
C/W
°
C/W
PC7447
PC7457
R
θ
JA
R
θ
JMA
R
θ
JMA
R
θ
JMA
R
θ
JB
R
θ
JC
(2)(3)
Junction-to-ambient thermal resistance, natural convection
22
20
(2)(4)
Junction-to-ambient thermal resistance, natural convection, four-layer (2s2p) board
14
14
(2)(4)
Junction-to-ambient thermal resistance, 200 ft./min. airflow, single-layer (1s) board
16
15
(2)(4)
Junction-to-ambient thermal resistance, 200 ft./min. airflow, four-layer (2s2p) board
11
11
(5)
Junction-to-board thermal resistance
6
6
(6)
Junction-to-case thermal resistance
< 0.1
< 0.1
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