參數(shù)資料
型號： PC7447VGH1000N
廠商： Atmel Corp.
英文描述： PowerPC 7457 RISC Microprocessor
中文描述： 7457的PowerPC RISC微處理器
文件頁數(shù)： 12/66頁
文件大?。?/td> 522K
代理商： PC7447VGH1000N
12
PC7457/47 [Preliminary]
5345B–HIREL–02/04
7. L3VSEL must be set to 0, such that the bus is in 1.8V mode.
8. L3VSEL must be set to HRESET or 1, such that the bus is in 2.5V mode.
9. Caution: V
IN
must not exceed OV
DD
or GV
DD
by more than 0.3V at any time including during power-on reset.
10. V
IN
may overshoot/undershoot to a voltage and for a maximum duration as shown in Figure 3.
Recommended
Operating Conditions
Notes:
1. These are the recommended and tested operating conditions. Proper device operation outside of these conditions is not
guaranteed.
2. This voltage is the input to the filter discussed in Section “PLL Power Supply Filtering” on page 54 and not necessarily the
voltage at the AV
DD
pin which may be reduced from V
DD
by the filter.
3. HRESET is the inverse of HRESET.
Figure 3.
Overshoot/Undershoot Voltage
Table 3.
Recommended Operating Conditions
(1)
Symbol
Characteristic
Recommended Value
Unit
Min
Max
V
DD
Core supply voltage
1.3V ±50 mV or 1.1V ±50 mV
V
AV
DD
(2)
PLL supply voltage
1.3V ±50 mV or 1.1V ±50 mV
V
OV
DD
Processor bus supply voltage
BVSEL = 0
1.8V ±5%
V
OV
DD
BVSEL = HRESET or OV
DD
2.5V ±5%
V
GV
DD
L3 bus supply voltage
L3VSEL = 0
1.8V ±5%
V
GV
DD
L3VSEL = HRESET or GV
DD
2.5V ±5%
V
GV
DD
(3)
L3VSEL = HRESET
1.5V ±5%
V
V
IN
Input voltage
Processor bus
GND
OV
DD
V
V
IN
L3 bus
GND
GV
DD
V
V
IN
JTAG signals
GND
OV
DD
V
°
C
T
j
Die-junction temperature
-55
125
GND
GND – 0.3V
GND – 0.7V
Not to exceed 10% of tSYSCLK
OVDD/GVDD + 20%
OVDD/GVDD + 5%
OVDD/GVDD
VIH
VIL
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