參數(shù)資料
型號(hào)： PC7457MGU1000L
廠商： Atmel Corp.
英文描述： PowerPC 7457 RISC Microprocessor
中文描述： 7457的PowerPC RISC微處理器
文件頁數(shù)： 6/66頁
文件大?。?/td> 522K
代理商： PC7457MGU1000L
6
PC7457/47 [Preliminary]
5345B–HIREL–02/04
Performs alignment, normalization, and precision conversion for floating-
point data
Executes cache control and TLB instructions
Performs alignment, zero padding, and sign extension for integer data
Supports hits under misses (multiple outstanding misses)
Supports both big- and little-endian modes, including misaligned little-endian
accesses
Three issue queues FIQ, VIQ, and GIQ can accept as many as one, two, and three
instructions, respectively, in a cycle. Instruction dispatch requires the following:
–
Instructions can be dispatched only from the three lowest IQ entries – IQ0,
IQ1, and IQ2
–
A maximum of three instructions can be dispatched to the issue queues per
clock cycle
–
Space must be available in the CQ for an instruction to dispatch (this
includes instructions that are assigned a space in the CQ but not in an issue
queue)
Rename buffers
–
16 GPR rename buffers
–
16 FPR rename buffers
–
16 VR rename buffers
Dispatch unit
–
Decode/dispatch stage fully decodes each instruction
Completion unit
–
The completion unit retires an instruction from the 16-entry completion
queue (CQ) when all instructions ahead of it have been completed, the
instruction has finished execution, and no exceptions are pending
–
Guarantees sequential programming model (precise exception model)
–
Monitors all dispatched instructions and retires them in order
–
Tracks unresolved branches and flushes instructions after a mispredicted
branch
–
Retires as many as three instructions per clock cycle
Separate on-chip L1 Instruction and data caches (Harvard Architecture)
–
32 Kbyte, eight-way set-associative instruction and data caches
–
Pseudo least-recently-used (PLRU) replacement algorithm
–
32-byte (eight-word) L1 cache block
–
Physically indexed/physical tags
–
Cache write-back or write-through operation programmable on a per-page or
per-block basis
–
Instruction cache can provide four instructions per clock cycle; data cache
can provide four words per clock cycle
–
Caches can be disabled in software
–
Caches can be locked in software
相關(guān)PDF資料
PDF描述
PC7457MGU1000N PowerPC 7457 RISC Microprocessor
PC7457MGU1200L PowerPC 7457 RISC Microprocessor
PC7457MGU1200N PowerPC 7457 RISC Microprocessor
PC7457MGU933L PowerPC 7457 RISC Microprocessor
PC7457MGU933N PowerPC 7457 RISC Microprocessor
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PC7457MGU1000N 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:PowerPC 7457 RISC Microprocessor
PC7457MGU1200L 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:PowerPC 7457 RISC Microprocessor
PC7457MGU1200N 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:PowerPC 7457 RISC Microprocessor
PC7457MGU933L 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:PowerPC 7457 RISC Microprocessor
PC7457MGU933N 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:PowerPC 7457 RISC Microprocessor
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*