參數(shù)資料
型號(hào): PC7457VGU1200N
廠商: Atmel Corp.
英文描述: PowerPC 7457 RISC Microprocessor
中文描述: 7457的PowerPC RISC微處理器
文件頁數(shù): 31/66頁
文件大?。?/td> 522K
代理商: PC7457VGU1200N
31
PC7457/47 [Preliminary]
5345B–HIREL–02/04
Figure 14 shows the L3 bus timing diagrams for the PC7457 interfaced to MSUG2 SRAMs.
Figure 14.
L3 Bus Timing Diagrams for L3 Cache DDR SRAMs
Note:
t
L3CHDV
and t
L3CLDV
as drawn here will be negative numbers, that is, output valid time will be time before the clock edge.
Notes:
1. t
L3DVEH
and t
L3DVEL
as drawn here will be negative numbers, that is, input setup time will be time after the clock edge.
2. VM = Midpoint Voltage (GV
DD
/2)
L3_CLK[0,1]
ADDR, L3CNTL
VM
tL3CHOV
tL3CHOX
VM
tL3CHOZ
VM
VM
VM
tL3CHDV
tL3CHDX
Outputs
tL3CLDV
tL3CLDX
tL3CLDZ
L3DATA WRITE
L3_ECHO_CLK[0,1,2,3]
L3 Data and Data
Parity Inputs
VM
VM
VM
VM
VM
Inputs
tL3DVEH
tL3DXEL
tL3DVEL
tL3DXEH
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