參數(shù)資料
型號(hào)： PC755CMGU350LE
廠商： ATMEL CORP
元件分類： 微控制器/微處理器
英文描述： PowerPC 755/745 RISC Microprocessor
中文描述： 32-BIT, 350 MHz, RISC PROCESSOR, CBGA360
封裝： CERAMIC, BGA-360
文件頁數(shù)： 14/50頁
文件大小： 1064K
代理商： PC755CMGU350LE
14
PC755/745
2138D–HIREL–06/03
Detailed
Specification
Scope
This drawing describes the specific requirements for the microprocessor PC755, in com-
pliance with Atmel Grenoble standard screening.
Applicable Documents
1) MIL-STD-883: Test methods and procedures for electronics.
2) MIL-PRF-38535 appendix A: General specifications for microcircuits.
Requirements
General
The microcircuits are in accordance with the applicable documents and as specified
herein.
Design and Construction
Terminal Connections
Depending on the package, the terminal connections is shown in Table 1, Table 2 and
Figure 4.
Absolute Maximum Rating
Notes:
1. Functional and tested operating conditions are given in Table 5. Absolute maximum ratings are stress ratings only, and func-
tional operation at the maximums is not guaranteed. Stresses beyond those listed may affect device reliability or cause
permanent damage to the device.
2. Caution: V
IN
must not exceed OV
DD
or L2OV
DD
by more than 0.3V at any time including during power-on reset.
3. Caution: L2OV
DD
/OV
DD
must not exceed V
DD
/AV
DD
/L2AV
DD
by more than 1.6V during normal operation. During power-on
reset and power-down sequences, L2OV
DD
/OV
DD
may exceed V
DD
/AV
DD
/L2AV
DD
by up to 3.3V for up to 20 ms, or by 2.5V
for up to 40 ms. Excursions beyond 3.3V or 40 ms are not supported.
4. Caution: V
DD
/AV
DD
/L2AV
DD
must not exceed L2OV
DD
/OV
DD
by more than 0.4V during normal operation. During power-on
reset and power-down sequences, V
DD
/AV
DD
/L2AV
DD
may exceed L2OV
DD
/OV
DD
by up to 1.0V for up to 20 ms, or by 0.7V
for up to 40 ms. Excursions beyond 1.0V or 40 ms are not supported.
5. This is a DC specifications only. V
IN
may overshoot/undershoot to a voltage and for a maximum duration as shown in Figure
5.
Table 3.
Absolute Maximum Ratings
(1)
Characteristic
Symbol
Maximum Value
Unit
Core supply voltage
(4)
V
DD
-0.3 to 2.5
V
PLL supply voltage
(4)
AV
DD
-0.3 to 2.5
V
L2 DLL supply voltage
(4)
L2AV
DD
-0.3 to 2.5
V
Processor bus supply voltage
(3)
OV
DD
-0.3 to 3.6
V
L2 bus supply voltage
(3)
L2OV
DD
-0.3 to 3.6
V
Input voltage
Processor bus
(2)(5)
V
in
-0.3 to OV
DD
+ 0.3V
V
L2 Bus
(2)(5)
V
in
-0.3 to L2OV
DD
+ 0.3V
V
JTAG Signals
V
in
-0.3 to 3.6
V
Storage temperature range
T
stg
-65 to 150
°
C
Rework Temperature
T
rwk
220
°
C
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