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| 型號： | PCA8574APW,112 |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 30/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC I/O EXPANDER I2C 8B 16TSSOP |
| 產(chǎn)品培訓(xùn)模塊： | I²C Bus Fundamentals |
| 特色產(chǎn)品： | NXP - I2C Interface |
| 標(biāo)準(zhǔn)包裝： | 96 |
| 接口： | I²C |
| 輸入/輸出數(shù)： | 8 |
| 中斷輸出： | 是 |
| 頻率 - 時鐘： | 400kHz |
| 電源電壓： | 2.3 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-TSSOP |
| 包裝： | 管件 |
| 包括： | POR |
| 產(chǎn)品目錄頁面： | 824 (CN2011-ZH PDF) |
| 其它名稱： | 568-4237-5 935283759112 PCA8574APW |
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PCA8574_PCA8574A
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 3 — 3 June 2013
7 of 32
NXP Semiconductors
PCA8574; PCA8574A
Remote 8-bit I/O expander for I2C-bus with interrupt
8.
I/O programming
8.1 Quasi-bidirectional I/Os
A quasi-bidirectional I/O is an input or output port without using a direction control register.
Whenever the master reads the register, the value returned to master depends on the
actual voltage or status of the pin. At power-on, all the ports are HIGH with a weak 100
A
internal pull-up to VDD, but can be driven LOW by an internal transistor, or an external
signal. The I/O ports are entirely independent of each other, but each I/O octal is
controlled by the same read or write data byte.
Advantages of the quasi-bidirectional I/O over totem pole I/O include:
Better for driving LEDs since the p-channel (transistor to VDD) is small, which saves
die size and therefore cost. LED drive only requires an internal transistor to ground,
while the LED is connected to VDD through a current-limiting resistor. Totem pole I/O
have both n-channel and p-channel transistors, which allow solid HIGH and LOW
output levels without a pull-up resistor — good for logic levels.
Simpler architecture — only a single register and the I/O can be both input and output
at the same time. Totem pole I/O have a direction register that specifies the port pin
direction and it is always in that configuration unless the direction is explicitly
changed.
Does not require a command byte. The simplicity of one register (no need for the
pointer register or, technically, the command byte) is an advantage in some
embedded systems where every byte counts because of memory or bandwidth
limitations.
There is only one register to control four possibilities of the port pin: Input HIGH, input
LOW, output HIGH, or output LOW.
Input HIGH: The master needs to write 1 to the register to set the port as an input mode
if the device is not in the default power-on condition. The master reads the register to
check the input status. If the external source pulls the port pin up to VDD or drives
logic 1, then the master will read the value of 1.
Input LOW: The master needs to write 1 to the register to set the port to input mode if
the device is not in the default power-on condition. The master reads the register to
check the input status. If the external source pulls the port pin down to VSS or drives
logic 0, which sinks the weak 100
A current source, then the master will read the value
of 0.
Output HIGH: The master writes 1 to the register. There is an additional ‘a(chǎn)ccelerator’ or
strong pull-up current when the master sets the port HIGH. The additional strong pull-up
is only active during the HIGH time of the acknowledge clock cycle. This accelerator
current helps the port’s 100
A current source make a faster rising edge into a heavily
loaded output, but only at the start of the acknowledge clock cycle to avoid bus
contention if an external signal is pulling the port LOW to VSS/driving the port with
logic 0 at the same time. After the half clock cycle there is only the 100
A current
source to hold the port HIGH.
Output LOW: The master writes 0 to the register. There is a strong current sink
transistor that holds the port pin LOW. A large current may flow into the port, which
could potentially damage the part if the master writes a 0 to the register and an external
source is pulling the port HIGH at the same time.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PCA8574APW-T | 功能描述:接口-I/O擴(kuò)展器 8-BIT I2C FM QB GPIO INT PU RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA8574ATS | 功能描述:接口-I/O擴(kuò)展器 8-BIT I2C FM QB GPIO INT PU RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA8574ATS,112 | 功能描述:接口-I/O擴(kuò)展器 8-BIT I2C FM QB RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA8574ATS,118 | 功能描述:接口-I/O擴(kuò)展器 8-BIT I2C FM QB RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA8574ATS-T | 功能描述:接口-I/O擴(kuò)展器 8-BIT I2C FM QB GPIO INT PU RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
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