參數(shù)資料
型號： PCA8575DK
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： Remote 16-bit I/O expander for I2C-bus with interrupt
中文描述： 18 I/O, PIA-GENERAL PURPOSE, PDSO24
封裝： 3.90 MM, 0.635 MM PITCH, PLASTIC, MO-137, SOT556-1, SSOP-24
文件頁數(shù)： 17/30頁
文件大?。?/td> 168K
代理商： PCA8575DK
PCA8575_1
NXP B.V. 2006. All rights reserved.
Objective data sheet
Rev. 01 — 30 November 2006
17 of 30
NXP Semiconductors
PCA8575
Remote 16-bit I/O expander for I
2
C-bus with interrupt
13. Dynamic characteristics
[1]
t
VD;ACK
= time for Acknowledgement signal from SCL LOW to SDA (out) LOW.
t
VD;DAT
= minimum time for SDA data out to be valid following SCL LOW.
A master device must internally provide a hold time of at least 300 ns for the SDA signal (refer to the V
IL
of the SCL signal) in order to
bridge the undefined region SCLs falling edge.
[2]
[3]
[4]
The maximum t
f
for the SDA and SCL bus lines is specified at 300 ns. The maximum fall time for the SDA output stage t
f
is specified at
250 ns. This allows series protection resistors to be connected between the SDA and the SCL pins and the SDA/SCL bus lines without
exceeding the maximum specified t
f
.
C
b
= total capacitance of one bus line in pF.
Input filters on the SDA and SCL inputs suppress noise spikes less than 50 ns.
[5]
[6]
Table 6.
V
DD
= 2.3 V to 5.5 V; V
SS
= 0 V; T
amb
=
40
°
C to +85
°
C; unless otherwise specified.
Symbol
Parameter
Dynamic characteristics
Conditions
Fast mode I
2
C-bus
Min
Typ
-
-
Unit
Max
f
SCL
t
BUF
SCL clock frequency
bus free time between a STOP and START
condition
hold time (repeated) START condition
set-up time for a repeated START condition
set-up time for STOP condition
data hold time
data valid acknowledge time
data valid time
data set-up time
LOW period of the SCL clock
HIGH period of the SCL clock
fall time of both SDA and SCL signals
rise time of both SDA and SCL signals
pulse width of spikes that must be suppressed
by the input filter
Port timing; C
L
≤
100 pF (see
Figure 11
and
Figure 12
)
t
v(Q)
data output valid time
t
su(D)
data input set-up time
t
h(D)
data input hold time
Interrupt timing; C
L
≤
100 pF (see
Figure 11
and
Figure 12
)
t
v(D)
data input valid time
t
d(rst)
reset delay time
0
1.3
400
-
kHz
μ
s
t
HD;STA
t
SU;STA
t
SU;STO
t
HD;DAT
t
VD;ACK
t
VD;DAT
t
SU;DAT
t
LOW
t
HIGH
t
f
t
r
t
SP
0.6
0.6
0.6
0
-
-
-
-
-
-
-
-
-
-
-
-
-
0.9
-
-
-
-
300
300
50
μ
s
μ
s
μ
s
ns
μ
s
ns
ns
μ
s
μ
s
ns
ns
ns
[1]
0.1
[2]
50
100
1.3
0.6
[3][4]
20 + 0.1C
b
[5]
-
20 + 0.1C
b
[5]
-
[6]
-
-
-
0
4
-
-
-
4
-
-
μ
s
μ
s
μ
s
-
-
-
-
4
4
μ
s
μ
s
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參數(shù)描述
PCA8575DK,118 功能描述:接口-I/O擴(kuò)展器 16-BIT I2C FM QB RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel
PCA8575DK-T 功能描述:接口-I/O擴(kuò)展器 16-BIT I2C FM QB GPIO INT PU RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel
PCA8575PW 功能描述:接口-I/O擴(kuò)展器 16-BIT I2C FM QB GPIO INT PU RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel
PCA8575PW,112 功能描述:接口-I/O擴(kuò)展器 16-BIT I2C FM QB RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel
PCA8575PW,118 功能描述:接口-I/O擴(kuò)展器 16-BIT I2C FM QB GPIO INT PU RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel
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