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參數(shù)資料
| 型號： | PCA9500D,118 |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 26/26頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC I/O EXPANDER I2C 8B 16SOIC |
| 標準包裝： | 1,000 |
| 接口： | I²C，SM 總線 |
| 輸入/輸出數(shù)： | 8 |
| 中斷輸出： | 無 |
| 頻率 - 時鐘： | 400kHz |
| 電源電壓： | 2.5 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.295"，7.50mm 寬） |
| 供應商設備封裝： | 16-SO |
| 包裝： | 帶卷 (TR) |
| 包括： | EEPROM，POR |
| 其它名稱： | 935271533118 PCA9500D-T PCA9500D-T-ND |
PCA9500_4
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 04 — 15 April 2009
9 of 26
NXP Semiconductors
PCA9500
8-bit I2C-bus and SMBus I/O port with 2-kbit EEPROM
7.4.2.2
Random read
The PCA9500's random read mode allows the address to be read from to be specied by
the master. This is done by performing a dummy write to set the address counter to the
location to be read. The master must perform a byte write to the address location to be
read, but instead of transmitting the data after receiving the acknowledge from the
PCA9500, the master re-issues the START condition and memory slave address with the
R/W bit set to one. The PCA9500 will then transmit an acknowledge and use the next
eight clock cycles to transmit the data contained in the addressed location. The master
ceases the transmission by issuing the STOP condition after the eighth bit, omitting the
ninth clock cycle acknowledge.
7.4.2.3
Sequential read
The PCA9500 sequential read is an extension of either the current address read or
random read. If the master does not issue a STOP condition after it has received the
eighth data bit, but instead issues an acknowledge, the PCA9500 will increment the
address counter and use the next eight cycles to transmit the data from that location. The
master can continue this process to read the contents of the entire memory. Upon
reaching address 255 the counter will return to address 0 and continue transmitting data
until a STOP condition is received. The master ceases the transmission by issuing the
STOP condition after the eighth bit, omitting the ninth clock cycle acknowledge.
Fig 12. Current address read
1
A
S
slave address (memory)
START condition
R/W
acknowledge
from slave
002aae596
data from memory
SDA
0
1
0
A2 A1 A0
1
P
STOP condition
Fig 13. Random read
0
A
S
slave address (memory)
START condition
R/W
acknowledge
from slave
002aae597
word address
SDA
0
1
0
A2 A1 A0
1
P
STOP
condition
A
acknowledge
from slave
data from memory
A
acknowledge
from slave
1
S
slave address (memory)
START condition
R/W
0
1
0
A2 A1 A0
1
Fig 14. Sequential read
1
A
S
slave address (memory)
START condition
R/W
acknowledge
from slave
002aae598
data from memory
SDA
0
1
0
A2 A1 A0
1
P
STOP
condition
A
acknowledge
from master
data from memory
DATA n
data from memory
DATA n + 1
A
acknowledge
from master
DATA n + X
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| PCA9500PW | 功能描述:接口-I/O擴展器 I/O EXPANDER W/2K EE RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA9500PW,112 | 功能描述:接口-I/O擴展器 I/O EXPANDER W/2K EE RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA9500PW,118 | 功能描述:接口-I/O擴展器 8BIT I2C FMQB GPIO PU2K EEPROM RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA9500PW,118-CUT TAPE | 制造商:NXP 功能描述:PCA9500 Series 8-Bit I2C and SMBus I/O Port with 2-kbit EEPROM - TSSOP - 16 |
| PCA9500PW112 | 制造商:NXP Semiconductors 功能描述:IC I/O EXPANDER 8BIT 400KHZ TSSOP-16 |
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