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參數(shù)資料
| 型號(hào)： | PCA9534D,118 |
| 廠商： | NXP Semiconductors |
| 文件頁(yè)數(shù)： | 22/25頁(yè) |
| 文件大小： | 0K |
| 描述： | IC I/O EXPANDER I2C 8B 16SOIC |
| 產(chǎn)品培訓(xùn)模塊： | I²C Bus Fundamentals |
| 特色產(chǎn)品： | NXP - I2C Interface |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 接口： | I²C，SM 總線 |
| 輸入/輸出數(shù)： | 8 |
| 中斷輸出： | 是 |
| 頻率 - 時(shí)鐘： | 400kHz |
| 電源電壓： | 2.3 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SO |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 包括： | POR |
| 產(chǎn)品目錄頁(yè)面： | 825 (CN2011-ZH PDF) |
| 其它名稱： | 568-1833-6 |
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PCA9534_3
NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 6 November 2006
6 of 25
NXP Semiconductors
PCA9534
8-bit I2C-bus and SMBus low power I/O port with interrupt
6.1.5 Register 3 - Conguration register
This register congures the directions of the I/O pins. If a bit in this register is set, the
corresponding port pin is enabled as an input with high-impedance output driver. If a bit in
this register is cleared, the corresponding port pin is enabled as an output. At reset, the
I/Os are congured as inputs.
6.2 Power-on reset
When power is applied to VDD, an internal Power-On Reset (POR) holds the PCA9534 in
a reset condition until VDD has reached VPOR. At that point, the reset condition is released
and the PCA9534 registers and state machine will initialize to their default states.
Thereafter, VDD must be lowered below 0.2 V to reset the device.
For a power reset cycle, VDD must be lowered below 0.2 V and then restored to the
operating voltage.
6.3 Interrupt output
The open-drain interrupt output is activated when one of the port pins change state and
the pin is congured as an input. The interrupt is deactivated when the input returns to its
previous state or the Input Port register is read.
Note that changing an I/O from and output to an input may cause a false interrupt to occur
if the state of the pin does not match the contents of the Input Port register.
6.4 I/O port
When an I/O is congured as an input, FETs Q1 and Q2 are off, creating a
high-impedance input. The input voltage may be raised above VDD to a maximum of 5.5 V.
If the I/O is congured as an output, then either Q1 or Q2 is enabled, depending on the
state of the Output Port register. Care should be exercised if an external voltage is applied
to an I/O congured as an output because of the low-impedance paths that exist between
the pin and either VDD or VSS.
Table 7.
Register 3 - Conguration register bit description
Legend: * default value.
Bit
Symbol
Access
Value
Description
7
C7
R/W
1*
congures the directions of the I/O pins
0 = corresponding port pin enabled as an output
1 = corresponding port pin congured as input
(default value)
6
C6
R/W
1*
5
C5
R/W
1*
4
C4
R/W
1*
3
C3
R/W
1*
2
C2
R/W
1*
1
C1
R/W
1*
0
C0
R/W
1*
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| PCA9534DB | 功能描述:接口-I/O擴(kuò)展器 Rem 8B I2C & Lo-Pwr I/O Expander RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA9534DBG4 | 功能描述:接口-I/O擴(kuò)展器 Rem 8B I2C & Lo-Pwr I/O Expander RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA9534DBQR | 制造商:TI 制造商全稱:Texas Instruments 功能描述:REMOTE 8-BIT I2C AND SMBus LOW-POWER I/O EXPANDER WITH INTERRUPT OUTPUT AND CONFIGURATION REGISTERS |
| PCA9534DBR | 功能描述:接口-I/O擴(kuò)展器 Remote 8B I2C & Lo- Pwr I/O Expander RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA9534DBRG4 | 功能描述:接口-I/O擴(kuò)展器 Remote 8B I2C & Lo- Pwr I/O Expander RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
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