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參數(shù)資料
型號: PCA9534PW,118
廠商: NXP Semiconductors
文件頁數(shù): 2/25頁
文件大?。?/td> 0K
描述: IC I/O EXPANDER I2C 8B 16TSSOP
產(chǎn)品培訓(xùn)模塊: I²C Bus Fundamentals
特色產(chǎn)品: NXP - I2C Interface
標(biāo)準(zhǔn)包裝: 1
接口: I²C,SM 總線
輸入/輸出數(shù): 8
中斷輸出:
頻率 - 時鐘: 400kHz
電源電壓: 2.3 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 16-TSSOP
包裝: 標(biāo)準(zhǔn)包裝
包括: POR
產(chǎn)品目錄頁面: 825 (CN2011-ZH PDF)
其它名稱: 568-1834-6
PCA9534_3
NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 6 November 2006
10 of 25
NXP Semiconductors
PCA9534
8-bit I2C-bus and SMBus low power I/O port with interrupt
7.
Application design-in information
7.1 Minimizing IDD when the I/O us used to control LEDs
When the I/Os are used to control LEDs, they are normally connected to VDD through a
resistor as shown in Figure 12. Since the LED acts as a diode, when the LED is off the
I/O VI is about 1.2 V less than VDD. The supply current, IDD, increases as VI becomes
lower than VDD.
Designs needing to minimize current consumption, such as battery power applications,
should consider maintaining the IOn pins greater than or equal to VDD when the LED is
off. Figure 13 shows a high value resistor in parallel with the LED. Figure 14 shows VDD
less than the LED supply voltage by at least 1.2 V. Both of these methods maintain the
I/O VI at or above VDD and prevents additional supply current consumption when the LED
is off.
Device address congured as 0100 100X for this example.
IO0, IO1, IO2 congured as outputs.
IO3, IO4, IO5 congured as inputs.
IO6, IO7 are not used and must be congured as outputs.
Fig 12. Typical application
PCA9534
IO0
IO1
SCL
SDA
VDD
002aac476
SCL
SDA
IO2
IO3
VDD
VSS
MASTER
CONTROLLER
VSS
VDD (5 V)
2 k
SUBSYSTEM 1
(e.g., temp. sensor)
INT
SUBSYSTEM 2
(e.g., counter)
RESET
controlled switch
(e.g., CBT device)
A
B
enable
INT
5 V
INT
10 k
10 k
SUBSYSTEM 3
(e.g., alarm system)
ALARM
IO4
IO5
VDD
A2
A1
A0
IO6
IO7
100 k
(
× 3)
10 k
10 k
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