Octal SMBus and I2C registered interface
參數(shù)資料
型號: PCA9556PW,118
廠商: NXP Semiconductors
文件頁數(shù): 2/13頁
文件大?。?/td> 0K
描述: IC I/O EXPANDER I2C 8B 16TSSOP
標(biāo)準(zhǔn)包裝: 2,500
接口: I²C,SM 總線
輸入/輸出數(shù): 8
中斷輸出:
頻率 - 時鐘: 100kHz
電源電壓: 3 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 16-TSSOP
包裝: 帶卷 (TR)
包括: POR
其它名稱: 935262899118
PCA9556PW-T
PCA9556PW-T-ND
Philips Semiconductors
Product data
PCA9556
Octal SMBus and I2C registered interface
2002 Mar 28
10
DC CHARACTERISTICS
VDD = 3.0 to 5.5 V; VSS = 0 V; Tamb = –40 to +85 °C; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
VDD = 3.3 V
VDD = 5 V
UNIT
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNIT
Supplies
VDD
Supply voltage
3.0
3.6
4.5
5.5
V
IDD
Supply current
Operating mode; no load;
VI = VDD or VSS;
fSCL = 100 kHz
300
425
1100
1500
A
Istb
Standby current
Standby mode; no load;
VI = VDD or VSS;
fSCL = 0 kHz
25
50
65
100
A
VPOR
Power-on reset voltage
VDD = 3.3 V; no load;
VI = VDD or VSS; note 1
1.3
2.4
1.3
2.4
V
Input SCL; input/output SDA
VIL
LOW level input voltage
–0.5
0.8
–0.5
0.8
V
VIH
HIGH level input voltage
2.1
5.5
2.1
5.5
V
IOL
LOW level output current
VOL = 0.4 V
3
3
mA
IL
Leakage current
VI = VDD = VSS
–1
+1
–1
+1
A
CI
Input capacitance
VI = VSS
10
10
pF
I/Os
VIL
LOW level input voltage
–0.5
0.8
–0.5
0.8
V
VIH
HIGH level input voltage
2.0
VDD
+ 0.5
2.0
VDD
+ 0.5
V
IIHL(max)
Maximum allowed input current
through protection diode (I/O1 – I/O7)
VI ≥ VDD or VI ≤ VSS
±400
±400
A
IOL
LOW level output current
VOL = 0.55 V; VDD = 3.3 V;
note 2
8
10
8
10
mA
HIGH level output current except I/O0
VOH = 2.4 V; VDD = 3.3 V;
note 3
4
4
mA
IOH
HIGH level output current on I/O0
VDD = 3.6 V; VOH = 4.6 V
1
1
A
HIGH level output current on I/O0
VDD = 0 V; VOH = 3.3 V
1
1
A
IL
Input leakage current
VDD = 3.6 V; VI = 0 or VDD
–1
1
–1
1
A
CI
Input capacitance
10
10
pF
CO
Output capacitance
10
10
pF
Select Inputs A0, A1, A2, and RESET
VIL
LOW level input voltage
–0.5
0.8
–0.5
0.8
V
VIH
HIGH level input voltage
2.0
VDD
+ 0.5
2.0
VDD
+ 0.5
V
ILI
Input leakage current
–1
1
–1
1
A
NOTES:
1. The power-on reset circuit resets the SMBus logic with VDD < VPOR and sets all I/Os to their default values.
2. The maximum total sink current must be limited to 54 mA at +85
°C, and 80 mA at +70 °C.
3. The maximum total source current must be limited to 54 mA at +85
°C, and 80 mA at +70 °C.
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