參數(shù)資料
型號: PCA9557D,112
廠商: NXP Semiconductors
文件頁數(shù): 3/30頁
文件大小: 0K
描述: IC I/O EXPANDER I2C 8B 16SOIC
產(chǎn)品培訓(xùn)模塊: I²C Bus Fundamentals
特色產(chǎn)品: NXP - I2C Interface
標(biāo)準(zhǔn)包裝: 50
接口: I²C,SM 總線
輸入/輸出數(shù): 8
中斷輸出:
頻率 - 時鐘: 400kHz
電源電壓: 2.3 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-SO
包裝: 管件
包括: POR
產(chǎn)品目錄頁面: 826 (CN2011-ZH PDF)
其它名稱: 568-1060-5
935270674112
PCA9557D
PCA9557
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 7 — 10 December 2013
11 of 30
NXP Semiconductors
PCA9557
8-bit I2C-bus and SMBus I/O port with reset
8.4 Bus transactions
Data is transmitted to the PCA9557 registers using Write Byte transfers (see Figure 14
and Figure 15). Data is read from the PCA9557 registers using Read and Receive Byte
transfers (see Figure 16 and Figure 17).
Fig 13. Acknowledgement on the I2C-bus
002aaa987
S
START
condition
9
8
2
1
clock pulse for
acknowledgement
not acknowledge
acknowledge
data output
by transmitter
data output
by receiver
SCL from master
Fig 14. Write to output port register
0
A
S
slave address
START condition
R/W
acknowledge
from slave
002aad281
0000001
0
command byte
A
acknowledge
from slave
12345678
SCL
9
SDA
DATA 1
A
write to port
data out from port
tv(Q)
acknowledge
from slave
DATA 1 VALID
data to port
0
1
A2 A1 A0
0
P
STOP
condition
Fig 15. Write to I/O configuration or polarity inversion registers
0
A
S
slave address
START condition
R/W
acknowledge
from slave
002aad282
000001 1/0
0
command byte
A
acknowledge
from slave
12345678
SCL
9
SDA
DATA
A
acknowledge
from slave
data to register
0
1
A2 A1 A0
0
P
STOP
condition
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