參數(shù)資料
型號： PCA9673D
廠商： NXP Semiconductors N.V.
元件分類： I2C/I2S
英文描述： Remote 16-bit I-O expander for Fm+ I2C-bus with interrupt and reset
封裝： PCA9673BQ<SOT815-1 (DHVQFN24)|<<http://www.nxp.com/packages/SOT815-1.html<1<Always Pb-free,;PCA9673BS<SOT616-1 (HVQFN24)|<<http://www.nxp.com/packages/SOT616-1.html<1&
文件頁數(shù)： 21/33頁
文件大小： 283K
代理商： PCA9673D
PCA9673
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 29 September 2011
21 of 33
NXP Semiconductors
PCA9673
Remote 16-bit I/O expander for Fm+ I
2
C-bus with interrupt and reset
[2]
Each bit must be limited to a maximum of 25 mA and the total package limited to 400 mA due to internal busing limits.
[3]
The value is not tested, but verified on sampling basis.
13. Dynamic characteristics
[1]
t
VD;ACK
= time for Acknowledgement signal from SCL LOW to SDA (out) LOW.
t
VD;DAT
= minimum time for SDA data out to be valid following SCL LOW.
[2]
Table 6.
V
DD
= 2.3 V to 5.5 V; V
SS
= 0 V; T
amb
=
40
C to +85
C; unless otherwise specified.
Symbol
Parameter
Conditions
Dynamic characteristics
Standard mode
I
2
C-bus
Min
0
4.7
Fast mode I
2
C-bus
Fast-mode
Plus I
2
C-bus
Min
0
0.5
Unit
Max
100
-
Min
0
1.3
Max
400
-
Max
1000
-
f
SCL
t
BUF
SCL clock frequency
bus free time between a
STOP and START condition
hold time (repeated) START
condition
set-up time for a repeated
START condition
set-up time for STOP
condition
data hold time
data valid acknowledge time
data valid time
data set-up time
LOW period of the SCL clock
HIGH period of the SCL
clock
fall time of both SDA and
SCL signals
rise time of both SDA and
SCL signals
pulse width of spikes that
must be suppressed by the
input filter
Port timing; C
L
100 pF (see
Figure 14
and
Figure 15
)
t
v(Q)
data output valid time
t
su(D)
data input set-up time
t
h(D)
data input hold time
Interrupt timing; C
L
100 pF (see
Figure 14
and
Figure 15
)
t
v(D)
data input valid time
t
d(rst)
reset delay time
Reset timing (see
Figure 25
)
t
w(rst)
reset pulse width
t
rec(rst)
reset recovery time
t
rst
reset time
kHz
s
t
HD;STA
4.0
-
0.6
-
0.26
-
s
t
SU;STA
4.7
-
0.6
-
0.26
-
s
t
SU;STO
4.0
-
0.6
-
0.26
-
s
t
HD;DAT
t
VD;ACK
t
VD;DAT
t
SU;DAT
t
LOW
t
HIGH
0
-
0
-
0
-
ns
s
ns
ns
s
s
[1]
0.3
300
250
4.7
4.0
3.45
-
-
-
-
0.1
50
100
1.3
0.6
0.9
-
-
-
-
0.05
50
50
0.5
0.26
0.45
450
-
-
-
[2]
t
f
[4][5]
-
300
20 + 0.1C
b
[3]
300
-
120
ns
t
r
-
1000
20 + 0.1C
b
[3]
300
-
120
ns
t
SP
[6]
-
50
-
50
-
50
ns
-
0
4
4
-
-
-
0
4
4
-
-
-
0
4
4
-
-
s
s
s
-
-
4
4
-
-
4
4
-
-
4
4
s
s
4
0
-
-
-
4
0
-
-
-
4
0
-
-
-
ns
ns
ns
100
100
100
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PCA9673DB,112 功能描述:接口-I/O擴展器 16BIT I2C FM+ QBGPIO RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel
PCA9673DB,118 功能描述:接口-I/O擴展器 16BIT I2C FM+ QBGPIO RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel
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