參數(shù)資料
型號(hào)： PCA9675PW/S911,118
廠商： NXP Semiconductors
文件頁(yè)數(shù)： 4/29頁(yè)
文件大?。?/td> 0K
描述： IC I/O EXPANDER I2C 16B 24TSSOP
標(biāo)準(zhǔn)包裝： 2,500
接口： I²C
輸入/輸出數(shù)： 16
中斷輸出： 是
頻率 - 時(shí)鐘： 1MHz
電源電壓： 2.3 V ~ 5.5 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 24-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 24-TSSOP
包裝： 帶卷 (TR)
包括： POR
其它名稱： 935285489118
PCA9675PW/S911-T
PCA9675PW/S911-T-ND
PCA9675
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 3 October 2011
12 of 34
NXP Semiconductors
PCA9675
Remote 16-bit I/O expander for Fm+ I2C-bus with interrupt
8.
I/O programming
8.1 Quasi-bidirectional I/O architecture
The PCA9675’s 16 ports (see Figure 2) are entirely independent and can be used either
as input or output ports. Input data is transferred from the ports to the microcontroller in
the Read mode (see Figure 15). Output data is transmitted to the ports in the Write mode
Every data transmission from the PCA9675 must consist of an even number of bytes, the
first byte will be referred to as P07 to P00, and the second byte as P17 to P10. The third
will be referred to as P07 to P00, and so on.
This quasi-bidirectional I/O can be used as an input or output without the use of a control
signal for data directions. At power-on the I/Os are HIGH. In this mode only a current
source (IOH) to VDD is active. An additional strong pull-up to VDD (Itrt(pu)) allows fast rising
edges into heavily loaded outputs. These devices turn on when an output is written HIGH,
and are switched off by the negative edge of SCL. The I/Os should be HIGH before being
used as inputs. After power-on, as all the I/Os are set HIGH, all of them can be used as
inputs. Any change in setting of the I/Os as either inputs or outputs can be done with the
write mode.
Remark: If a HIGH is applied to an I/O which has been written earlier to LOW, a large
current (IOL) will flow to VSS.
8.2 Writing to the port (Output mode)
To write, the master (microcontroller) first addresses the slave device. By setting the last
bit of the byte containing the slave address to logic 0 the Write mode is entered. The
PCA9675 acknowledges and the master sends the first data byte for P07 to P00. After the
first data byte is acknowledged by the PCA9675, the second data byte P17 to P10 is sent
by the master. Once again, the PCA9675 acknowledges the receipt of the data. Each 8-bit
data is presented on the port lines after it has been acknowledged by the PCA9675.
The number of data bytes that can be sent successively is not limited. After every two
bytes, the previous data is overwritten.
The first data byte in every pair refers to Port 0 (P07 to P00), whereas the second data
byte in every pair refers to Port 1 (P17 to P10) (see Figure 13).
Fig 13. Correlation between bits and ports
A
002aab634
06
05
04
03
02
01
00
first byte
07
P06 P05 P04 P03 P02 P01 P00
P07
A
16
15
14
13
12
11
10
second byte
17
P16 P15 P14 P13 P12 P11 P10
P17
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