參數(shù)資料
型號(hào): PCD8582D-2T
廠商: NXP SEMICONDUCTORS
元件分類: PROM
英文描述: 256 x 8-bit CMOS EEPROMS with I2C-bus interface
中文描述: 256 X 8 I2C/2-WIRE SERIAL EEPROM, PDSO8
封裝: 3.90 MM, PLASTIC, SOT-96-1, SOP-8
文件頁數(shù): 13/20頁
文件大?。?/td> 153K
代理商: PCD8582D-2T
December 1994
13
Philips Semiconductors
Product specification
256 x 8-bit CMOS EEPROMS
with I
2
C-bus interface
PCX8582X-2 Family
I
2
C-BUS CHARACTERISTICS
All of the timing values are valid within the operating supply voltage and ambient temperature range and refer to V
IL
and
V
IH
with an input voltage swing from V
SS
to V
DD
.
Note
1.
The hold time required (not greater than 300 ns) to bridge the undefined region of the falling edge of SCL must be
internally provided by a transmitter.
SYMBOL
PARAMETER
CONDITIONS
MIN. MAX. UNIT
f
SCL
t
BUF
t
HD;STA
t
LOW
t
HIGH
t
SU;STA
t
HD;DAT
t
HD;DAT
t
SU;DAT
t
r
t
f
t
SU;STO
clock frequency
time the bus must be free before new transmission can start
start condition hold time after which first clock pulse is generated
LOW level clock period
HIGH level clock period
set-up time for start condition
data hold time for bus compatible masters
data hold time for bus devices
data set-up time
SDA and SCL rise time
SDA and SCL fall time
set-up time for stop condition
0
4.7
4.0
4.7
4.0
4.7
5
0
250
4.7
100
1
300
kHz
μ
s
μ
s
μ
s
μ
s
μ
s
μ
s
ns
ns
μ
s
ns
μ
s
repeated start
note 1
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