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參數(shù)資料
| 型號(hào)： | PCK2000MDB |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | XO, clock |
| 英文描述： | CK97 66/100MHz Mobile System Clock Generator |
| 中文描述： | 100 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
| 封裝： | PLASTIC, SSOP-28 |
| 文件頁(yè)數(shù)： | 4/12頁(yè) |
| 文件大?。?/td> | 81K |
| 代理商： | PCK2000MDB |
Philips Semiconductors
Product specification
PCK2000M
CK97 (66/100MHz) Mobile System Clock Generator
1998 Sep 29
4
SELECT FUNCTIONS
SEL100/66
SEL0
FUNCTION
NOTES
0
0
TRI-State
1
0
1
Active 66MHz
1
0
Test mode
1
1
1
Active 100MHz
NOTES:
1. Internal decode logic for all two select inputs implemented.
FUNCTION
DESCRIPTION
OUTPUTS
CPU
PCI, PCI_F
REF
Tri-State
Hi-Z
Hi-Z
Hi-Z
Test mode
TCLK/2
TCLK/6
TCLK
FUNCTION TABLE
SEL 100/66
CPU/PCI RATIO
CPUCLK (0–1)
(MHz)
CPICLK (1–5)
PCICLK_F
(MHz)
REF
(MHz)
0
2
66.66
33.33
14.318
1
3
100
33.33
14.318
CLOCK ENABLE CONFIGURATION
CPUSTOP
PCISTOP
PWRDWN
CPUCLK
PCICLK
PCICLK_F
OTHER
CLOCKS
PLL
OSCILLATOR
X
X
0
LOW
LOW
LOW
Stopped
OFF
OFF
0
0
1
LOW
LOW
33MHz
Running
Running
Running
0
1
1
LOW
33MHz
33MHz
Running
Running
Running
1
0
1
100/66MHz
LOW
33MHz
Running
Running
Running
1
1
1
100/66MHz
33MHz
33MHz
Running
Running
Running
POWER MANAGEMENT REQUIREMENTS
LATENCY
SIGNAL
SIGNAL STATE
NO. OF RISING EDGES OF FREE RUNNING
PCICLK
CPUSTOP
0 (DISABLED)
1
1 (ENABLED)
1
PCISTOP
0 (DISABLED)
1
1 (ENABLED)
1
PWRDWN
1 (NORMAL OPERATION)
3ms
0 (POWER DOWN)
2 MAX
NOTES:
1. Clock ON/OFF latency is defined as the number of rising edges of free running PCICLKs between the clock disable goes HIGH/LOW to the
first valid clock that comes out of the device.
2. Power up latency is when PWRDWN goes inactive (HIGH) to when the first valid clocks are driven from the device.
相關(guān)PDF資料 |
PDF描述 |
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| PCK2001MDB | 14.318-150 MHz I2C 1:10 Clock Buffer |
| PCK2002M | 0-300 MHz I2C 1:10 clock buffer |
| PCK2002MDB | 0-300 MHz I2C 1:10 clock buffer |
| PCK2002MPW | 0-300 MHz I2C 1:10 clock buffer |
| PCK2002P | 140 MHz PCI-X clock buffer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PCK2000MDB-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CPU System Clock Generator |
| PCK2001 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:14.318-150 MHz I2C 1:18 Clock Buffer |
| PCK2001DL | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:14.318-150 MHz I2C 1:18 Clock Buffer |
| PCK2001DL,112 | 功能描述:時(shí)鐘緩沖器 PII CLOCK DRIVER RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| PCK2001DL,118 | 功能描述:時(shí)鐘緩沖器 PII CLOCK DRIVER RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
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