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參數(shù)資料
| 型號： | PCK2010RDL |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | XO, clock |
| 英文描述： | CONN 622-5030 T&B |
| 中文描述： | 133 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 封裝： | 7.50 MM, PLASTIC, SSOP-56 |
| 文件頁數(shù)： | 9/18頁 |
| 文件大?。?/td> | 102K |
| 代理商： | PCK2010RDL |
Philips Semiconductors
Product specification
PCK2010R
CK98R (100/133MHz) RCC spread spectrum
system clock generator
1999 Oct 19
9
APIC(0–1) CLOCK OUTPUT (LUMP CAPACITANCE TEST LOAD = 20 pF)
SYMBOL
PARAMETER
LIMITS
T
amb
= 0
°
C to +70
°
C
133 MHz MODE
MIN
60.0
LIMITS
T
amb
= 0
°
C to +70
°
C
100 MHz MODE
MIN
60.0
UNIT
NOTES
MAX
64.0
MAX
64.0
T
HKP
T
HKH
T
HKL
T
HRISE
T
HFALL
T
JITTER
DUTY CYCLE
IOAPIC CLK period
ns
2, 9
IOAPIC CLK HIGH time
25.5
n/a
25.5
n/a
ns
5, 10
IOAPIC CLK LOW time
25.3
n/a
25.3
n/a
ns
6, 10
IOAPIC CLK rise time
0.4
1.6
0.4
1.6
ns
8
IOAPIC CLK fall time
0.4
1.6
0.4
1.6
ns
8
IOAPIC CLK cycle-cycle jitter
500
500
ps
IOAPIC CLK Duty Cycle
45
55
45
55
%
1
T
HSKW
IOAPIC CLK pin-pin skew
250
250
ps
2
3V66 CLOCK OUTPUT, 3V66 (0–3) (LUMP CAPACITANCE TEST LOAD = 30 pF)
SYMBOL
PARAMETER
LIMITS
T
amb
= 0
°
C to +70
°
C
133 MHz MODE
LIMITS
T
amb
= 0
°
C to +70
°
C
100 MHz MODE
UNIT
NOTES
MIN
15.0
MAX
16.0
MIN
15.0
MAX
16.0
T
HKP
T
HKH
T
HKL
T
HRISE
T
HFALL
T
JITTER
DUTY CYCLE
3V66 CLK period
ns
2, 9, 4
3V66 CLK HIGH time
5.25
n/a
5.25
n/a
ns
5, 10
3V66 CLK LOW time
5.05
n/a
5.05
n/a
ns
6, 10
3V66 CLK rise time
0.4
1.6
0.4
1.6
ns
8
3V66 CLK fall time
0.4
1.6
0.4
1.6
ns
8
3V66 CLK cycle-cycle jitter
500
500
ps
3V66 CLK Duty Cycle
45
55
45
55
%
1
T
HSKW
3V66 CLK pin-pin skew
250
250
ps
2
48MHZ(0–1) CLOCK OUTPUT (LUMP CAPACITANCE TEST LOAD = 20 pF)
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS
T
amb
= 0
°
C to +70
°
C
MIN
UNIT
NOTES
MAX
f
Frequency, Actual
Determined by PLL
divider ratio
(48.008 – 48)/48
48.008
MHz
f
D
Deviation from 48 MHz
+167
ppm
T
HRISE
(t
R
)
T
HFALL
(t
F
)
DUTY CYCLE (t
D
)
Output rise edge rate
1
4
ns
Output fall edge rate
1
4
ns
Duty Cycle
45
55
%
133 MHz
MIN
100 MHz
MIN
T
JITTER
CLK cycle-cycle jitter
MAX
500
MAX
500
ps
T
HSTB
(f
ST
)
Frequency stabilization from Power-up (cold start)
3
ms
NOTE:
1. See Figure 5 for measure points.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PCK2010R | CK98R (100/133MHz) RCC Spread Spectrum System Clock Generator(CK98 (100/133MHz)RCC 擴散光譜系統(tǒng)時鐘發(fā)生器) |
| PCK2010 | CK98 (100/133MHz) Spread Spectrum System Clock Generator(CK98 (100/133MHz) 擴散光譜系統(tǒng)始終發(fā)生器) |
| PCK2010DL | CK98 100/133MHz Spread Spectrum System Clock Generator |
| PCK2010RA | CK98R 100/133MHz RCC spread spectrum system clock generator |
| PCK2011 | Direct RAMbus Clock Generator(定向RAM總線時鐘發(fā)生器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PCK2011 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Direct RAMbus Clock Generator |
| PCK2011DL | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Direct RAMbus Clock Generator |
| PCK2014A | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:CK98 100/133 MHz spread spectrum system clock generator |
| PCK2014ADL | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:CK98 100/133 MHz spread spectrum system clock generator |
| PCK2014ADL,112 | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 CK98(100/133MHZ) SYS CLK GEN RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56 |
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