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參數(shù)資料
| 型號： | PCK2011DL |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | XO, clock |
| 英文描述： | Direct RAMbus Clock Generator |
| 中文描述： | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO24 |
| 封裝： | 0.150 INCH, PLASTIC, SOT-340-1, SSOP-24 |
| 文件頁數(shù)： | 7/11頁 |
| 文件大?。?/td> | 62K |
| 代理商： | PCK2011DL |
Philips Semiconductors
Preliminary specification
PCK2011
Direct Rambus
Clock Generator
1999 Jan 19
7
Table 3. DC DEVICE CHARACTERISTICS
Symbol
Parameter
Min
Max
Unit
V
DD
Supply voltage
3.135
3.465
V
T
A
Ambient operating temperature
0
70
°
C
t
CYCLE ,IN
Refclk Input cycle time
10
40
ns
t
J,IN
Input Cycle-to-cycle jitter
1
–
250
ps
DC
IN
Input duty cycle over 10,000 cycles
40%
60%
t
CYCLE
f
M,IN 3
Input frequency of modulation
30
33
kHz
P
M,IN
Modulation index
0.25
0.5
%
M IN3
P
M,IN
Modulation index for triangular modulation
–
0.6
%
Modulation index for non-triangular modulation
4
–
0.5
4
t
CYCLE,PD
Phase Detector input cycle time at PclkM & SynClkN
30
100
ns
t
ERR,INIT
Initial Phase error at Phase Detector inputs (Required range of Phase Aligner)
–0.5
0.5
t
CYCLE,PD
DC
IN,PD
Phase Detector input duty cycle over 10,000 cycles
25%
75%
t
CYCLE,PD
t
IR
, t
IF
Input slew rate (measured at 20% – 80% of input voltage) for PclkM, SynClkN, and Refclk
1
4
V/ns
C
IN,PD
C
IN,PD
Input capacitance at PclkM, SynClkN, and Refclk
2
–
7
pF
Input capacitance matching at PclkM and SynClkN
2
–
0.5
pF
C
IN,CMOS
Input capacitance at CMOS pins
2
–
10
pF
V
IL
Input (CMOS) signal low voltage
–
0.3
Vdd
V
IH
Input (CMOS) signal high voltage
0.7
–
Vdd
V
IL,R
Refclk input low voltage
–
0.3
VddI,R
V
IH,R
Refclk input high voltage
0.7
–
VddI,R
V
IL,PD
Input signal low voltage for PD inputs and StopB
–
0.3
VddI,PD
V
IH,PD
Input signal high voltage for PD inputs and StopB
0.7
–
VddI,PD
V
DDI,R
Input supply reference for Refclk
1.3
3.3
V
V
DDI,PD
NOTES:
1. Refclk jitter measured at V
DDI,R
(nom)/2
2. Capacitance measured at Freq = 1MHz, DC bias = 0.9V, and V
AC
<
100mV
3. If the input modulation is used, input modulation is allowed but not required.
4. The amount of allowed spreading for any non-triangular modulation is determined by the induced downstream tracking skew, which cannot
exceed the skew generated by the specified 0.6% triangular modulation. Typically, the amount of allowed non-triangular modulation is about
0.5%.
Input supply reference for PD inputs
1.3
3.3
V
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