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參數(shù)資料
| 型號： | PCKV857DGG,512 |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 11/15頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC 1:10 2.5V PLL CLK-DRVR48TSSOP |
| 標準包裝： | 39 |
| 類型： | 時鐘緩沖器/驅動器，多路復用器 |
| PLL： | 是 |
| 主要目的： | 存儲器，DDR，SDRAM |
| 輸入： | SSTL-2 |
| 輸出： | SSTL-2 |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:10 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 190MHz |
| 電源電壓： | 2.3 V ~ 2.7 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-TFSOP（0.240"，6.10mm 寬） |
| 供應商設備封裝： | 48-TSSOP |
| 包裝： | 管件 |
| 其它名稱： | 935269132512 PCKV857DGG PCKV857DGG-ND |
Philips Semiconductors
Product data
PCKV857
70–190 MHz differential 1:10 clock driver
2002 Sep 13
5
ABSOLUTE MAXIMUM RATINGS1
SYMBOL
PARAMETER
CONDITION
LIMITS
UNIT
SYMBOL
PARAMETER
CONDITION
MIN
MAX
UNIT
VDDQ
Supply voltage range
0.5
3.6
V
AVDD
Supply voltage range
0.5
3.6
V
VI
Input voltage range
see Notes 2 and 3
–0.5
VDDQ + 0.5
V
VO
Output voltage range
see Notes 2 and 3
–0.5
VDDQ + 0.5
V
IIK
Input clamp current
VI < 0 or VI >VDDQ
—
±50
mA
IOK
Output clamp current
VO < 0 or VO >VDDQ
—
±50
mA
IO
Continuous output current
VO = 0 to VDDQ
—
±50
mA
Continuous current to GND or VDDQ
—
±100
mA
Tstg
Storage temperature range
–65
+150
°C
NOTES:
1. Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating
conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output negative voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
3. This value is limited to 3.6 V maximum.
RECOMMENDED OPERATING CONDITIONS1
SYMBOL
PARAMETER
CONDITION
LIMITS
UNIT
SYMBOL
PARAMETER
CONDITION
MIN
TYP
MAX
UNIT
VDDQ
Supply voltage range
2.3
—
2.7
V
AVDD
Supply voltage range
2.2
—
2.7
V
VIL
Low level input voltage
CLK, CLK,
FBIN, FBIN
—
VDDQ/2 0.18
V
IL
g
PWRDWN
0.3
—
0.7
VIH
High level input voltage
CLK, CLK,
FBIN, FBIN
VDDQ/2 + 0.18
—
V
IH
gg
PWRDWN
1.7
—
VDDQ + 0.3
DC input signal voltage
Note 2
0.3
—
VDDQ
V
DC differential input signal voltage
CLK, FBIN
Note 3
0.36
—
VDDQ + 0.6
V
VID
AC differential input signal voltage
CLK, FBIN
Note 3
0.7
—
VDDQ + 0.6
V
VOX
Output differential cross-voltage
Note 4
VDDQ/2 0.2
VDDQ/2
VDDQ/2 + 0.2
V
VIX
Input differential cross-voltage
Note 4
VDDQ/2 0.2
—
VDDQ/2 + 0.2
V
IOH
High-level output current
—
12
mA
IOL
Low-level output current
—
12
mA
SR
Input slew rate
1
—
4
V/ns
Tamb
Operating free-air temperature
0
—
70
°C
NOTES:
1. Unused inputs must be held high or low to prevent them from floating.
2. DC input signal voltage specifies the allowable DC execution of differential input.
3. Differential input signal voltage specifies the differential voltage |VTR – VCP| required for switching, where VTR is the true input level and
VCP is the complementary input level.
4. Differential cross-point voltage is expected to track variations of VCC and is the voltage at which the differential signals must be crossing.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| PCKV857DGG-T | 功能描述:時鐘驅動器及分配 70-190MHZ 2.5V DIFF 1:10 CL DR RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| PCKV857DGV | 功能描述:時鐘驅動器及分配 70-190MHZ 2.5V DIFF 1:10 CLKDR RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| PCKV857DGV,112 | 功能描述:時鐘驅動器及分配 70-190MHZ 2.5V DIFF 1:10 CLKDR RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| PCKV857DGV,118 | 功能描述:時鐘驅動器及分配 70-190MHZ 2.5V DIFF 1:10 CLKDR RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| PCKV857DGV-T | 功能描述:時鐘驅動器及分配 70-190MHZ 2.5V DIFF 1:10 CLKDR RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
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