參數(shù)資料
型號(hào): PCM3002EG4
元件分類: Codec
英文描述: 16/20-BIT SINGLE-ENDED ANALOG INPUT/OUTPUT STEREO AUDIO CODECS
中文描述: 16/20-BIT單端模擬輸入/輸出立體聲編解碼器
文件頁數(shù): 5/39頁
文件大?。?/td> 515K
代理商: PCM3002EG4
www.ti.com
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
V
CC
1
V
CC
1
V
IN
R
V
REF
1
V
REF
2
V
IN
L
RST
ML
SYSCLK
LRCIN
BCKIN
DOUT
V
CC
2
AGND1
AGND2
V
COM
V
OUT
R
V
OUT
L
MC
MD
ZFLG
DIN
V
DD
DGND
PCM3002
(TOP VIEW)
P0004-02
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
V
CC
1
V
CC
1
V
IN
R
V
REF
1
V
REF
2
V
IN
L
PDAD
PDDA
SYSCLK
LRCIN
BCKIN
DOUT
V
CC
2
AGND1
AGND2
V
COM
V
OUT
R
V
OUT
L
DEM0
DEM1
20BIT
DIN
V
DD
DGND
PCM3003
(TOP VIEW)
PCM3002
PCM3003
SBAS079A–OCTOBER 2000–REVISED OCTOBER 2004
MIN
2.7
2.7
NOM
MAX
3.6
3.6
UNIT
V
V
Vp-p
Analog supply voltage, V
CC
1, V
CC
2
Digital supply voltage, V
DD
Analog input voltage, full scale (–0 dB)
Digital input logic family
3
3
V
CC
= 3 V
1.8
CMOS
System clock
Sampling clock
8.192
24.576
MHz
kHz
k
pF
pF
°
C
Digital input clock frequency
32
10
48
Analog output load resistance
Analog output load capacitance
Digital output load capacitance
Operating free-air temperature, T
A
30
10
–25
85
PIN ASSIGNMENTS—PCM3002
NAME
AGND1
AGND2
BCKIN
DGND
DIN
DOUT
LRCIN
MC
MD
ML
RST
SYSCLK
V
CC
1
V
CC
2
V
COM
V
DD
PIN
23
22
11
13
15
12
10
18
17
8
7
9
1, 2
24
21
14
I/O
I
I
O
I
I
I
I
I
I
DESCRIPTION
ADC analog ground
DAC analog ground
Bit clock input
(1)
Digital ground
Data input
(1)
Data output
Sample rate clock input (f
s
)
(1)
Bit clock for mode control
(1)(2)
Serial data for mode control
(1)(2)
Strobe pulse for mode control
(1)(2)
Reset, active LOW
(1)(2)
System clock input
(1)
ADC analog power supply
DAC analog power supply
ADC/DAC common
Digital power supply
(1)
(2)
Schmitt-trigger input
With 100-k
typical internal pulldown resistor
5
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PDF描述
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