參數(shù)資料
型號： PCM3060PW
元件分類： Codec
英文描述： 24-BIT, 96/192-kHz ASYNCHRONOUS STEREO AUDIO CODEC
中文描述： 24位96/192-kHz異步立體聲音頻編解碼
文件頁數(shù)： 22/45頁
文件大?。?/td> 394K
代理商： PCM3060PW
www.ti.com
SYNCHRONIZATION WITH DIGITAL AUDIO SYSTEM
As the PCM3060 operates under the system clock (SCKI1/2) and the audio sampling clock (LRCK1/2), SCKI1/2
and LRCK1/2 must have a specific relationship in slave mode. The PCM3060 does not need a specific phase
relationship between audio the interface clocks (LRCK1/2, BCK1/2) and system clock (SCKI1/2), but does
require a frequency synchronization of LRCK1/2, BCK1/2, and SCKI1/2.
If the relationship between SCKI2 and LRCK2 changes more than
±
6 BCK2s (BCK2 = 64 f
S
) or
±
5 BCK2s
(BCK2 = 48 f
S
) due to jitter or frequency change, etc., internal operation of DAC halts within 2/f
S
, and analog
output is forced to V
COM
(0.5V
CC
) until resynchronization of SCKI2 to LRCK2 and BCK2 is completed and then
t
DACDLY3
passes by.
If the relationship between SCKI1 and LRCK1 changes more than
±
6 BCK1s (BCK1 = 64 f
S
) or
±
5 BCK1s
(BCK1 = 48 f
) due to jitter, frequency change, etc., internal operation of ADC halts within 2/f
, and digital output
is forced into ZERO code until resynchronization of SCKI1 to LRCK1 and BCK1 is completed and then t
ADCDLY3
passes by.
In case of changes less than
±
5 BCK1/2s (BCK1/2 = 64) or
±
4 BCK1/2s (BCK1/2 = 48), resynchronization does
not occur, and previously described analog/digital output control and discontinuity do not occur.
Within 2/f
S
t
(DACDLY3)
(22/f )
S
Normal
V
COM
(0.5 V
)
CC
Undefined
Data
Normal
Synchronous
Asynchronous
Synchronous
DAC V
X+/–
OUT
State of Synchronization
Normal
Zero
Normal
ADC DOUT
Undefined
Data
T0020-08
t
(ADCDLY3)
(32/f )
S
PCM3060
SLAS533–MARCH 2007
Figure 27
illustrates the DAC analog output and ADC digital output for loss of synchronization.
During undefined data, it may generate some noise in audio signal. Also, the transition of normal to undefined
data and undefined or zero data to normal creates a discontinuity in the data on the analog and digital outputs,
which may generate some noise in the audio signal.
The ADC output, DOUT and DAC outputs, and V
OUT
X hold the previous state if the system clock halts.
Figure 27. DAC Output and ADC Output for Loss of Synchronization
22
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PCM3060PW 制造商:Texas Instruments 功能描述:LEADED PROCESS COMPATIBLE:YES
PCM3060PWG4 功能描述:接口—CODEC 24bit 96/192kHz Asynch St Aud Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
PCM3060PWR 功能描述:接口—CODEC 24B 96/192kHz Asynchronous Stereo RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
PCM3060PWRG4 功能描述:接口—CODEC 24bit 96/192kHz Asynch St Aud Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
PCM-307 制造商:Panduit Corp 功能描述:
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