![](http://datasheet.mmic.net.cn/Texas-Instruments/PCM3168ATPAPRQ1G4_datasheet_102052/PCM3168ATPAPRQ1G4_36.png)
CONTROL REGISTER DEFINITIONS (SOFTWARE MODE ONLY)
SBAS452 – SEPTEMBER 2008 ......................................................................................................................................................................................... www.ti.com
The PCM3168A and PCM3168A-Q1 have many user-programmable functions that are accessed via control
registers, and are programmed through the SPI or I2C serial control port. Table 15 shows the available mode control functions along with reset default conditions and associated register address.
Table 16 lists the register
map.
Table 15. User-Programmable Mode Control Functions
FUNCTION
RESET DEFAULT
REGISTER
LABEL
Mode control register reset for ADC and DAC operation
Normal operation
64
MRST
System reset for ADC and DAC operation
Normal operation
64
SRST
DAC sampling mode selection
Auto
64
SRDA[1:0]
DAC power-save mode selection
Power save
65
PSMDA
DAC master/slave mode selection
Slave
65
MSDA[2:0]
DAC audio interface format selection
I2S
65
FMTDA[3:0]
DAC operation control
Normal operation
66
OPEDA[3:0]
DAC digital filter roll-off control
Sharp roll-off
66
FLT[3:0]
DAC output phase selection
Normal
67
REVDA[8:1]
DAC soft mute control
Mute disabled
68
MUTDA[8:1]
DAC zero flag
Not detected
69
ZERO[8:1]
DAC digital attenuation mode
Channel independent
70
ATMDDA
DAC digital attenuation speed
N × 2048/fS
70
ATSPDA
DAC digital de-emphasis function control
Disabled
70
DEMP[1:0]
DAC zero flag function selection
Independent
70
AZRO[2:0]
DAC zero flag polarity selection
High for detection
70
ZREV
DAC digital attenuation level shifting
0 dB, no attenuation
71–79
ATDAx[7:0]
ADC sampling mode selection
Auto
80
SRAD[1:0]
ADC master/slave mode selection
Slave
81
MSAD[2:0]
ADC audio interface format selection
I2S
81
FMTAD[2:0]
ADC power-save control
Normal operation
82
PSVAD[2:0]
ADC HPF bypass control
Normal output, HPF enabled
82
BYP[2:0]
ADC input configuration control
Differential
83
SEAD[6:1]
ADC input phase selection
Normal
84
REVAD[6:1]
ADC soft mute control
Mute disabled
85
MUTAD[6:1]
ADC overflow flag
Not detected
86
OVF[6:1]
ADC digital attenuation mode
Channel independent
87
ATMDAD
ADC digital attenuation speed
N × 2048/fS
87
ATSPAD
ADC overflow flag polarity selection
High for detection
87
OVFP
ADC digital attenuation level setting
0 dB, no gain or attenuation
88–94
ATADx[7:0]
36
Copyright 2008, Texas Instruments Incorporated