參數(shù)資料
型號: PCM4108CPAPR
廠商: Texas Instruments, Inc.
英文描述: HIGH-PERFORMANCE, 24-BIT, 216kHz SAMPLING, EIGHT-CHANNEL AUDIO DIGITAL-TO-ANALOG CONVERTER
中文描述: 高性能,24位,216kHz的最大采樣,八聲道音頻數(shù)字模擬轉(zhuǎn)換器
文件頁數(shù): 23/39頁
文件大小: 551K
代理商: PCM4108CPAPR
./0
SBAS354 JUNE 2005
www.ti.com
23
Slot 1
Slot 2
Slot 3
Slot 4
Ch. 1
Ch. 2
Ch. 3
Ch. 4
In the case of BCK = 96f
S
, each time slot is 24 bits long and contains the 24bit audio data for the corresponding channel.
In the case of BCK = 128f
, each time slot is 32 bits long and contains the 24bit audio data for the corresponding channel.
The audio data is left justified in the time slot, with the the least significant 8 bits of each time slot being
don
t care
bits.
Audio data is always presented in two’s complement, MSBfirst format.
LRCK
Normal, Zero BCK Delay
LRCK
Normal, One BCK Delay
LRCK
Inverted, Zero BCK Delay
LRCK
Inverted, One BCK Delay
DATA0
DATA2
Ch. 5
Ch. 6
Ch. 7
Ch. 8
One Frame
BCK = 96f
or 128f
S
(SUBA = SUBB = 0)
TDM Data Formats
Quad Rate Sampling Mode
Figure 14. TDM Data Formats: Quad Rate Sampling Mode
LRCK
BCK
(BCKE = 0)
t
DS
t
DH
t
LRBKD
t
LRCKP
t
BNF
t
BKBF
One Frame
BCK
(BCKE = 1)
PARAMETER
DESCRIPTION
MIN
MAX
UNITS
1/f
BCK
12
1/f
BCK
12
10
10
ns
ns
ns
ns
ns
ns
t
LRCKP
t
LRBKD
t
DS
t
DH
t
BNF
t
BKBF
LRCK pulse width
LRCK active edge to BCK sampling edge delay
Data setup time
Data hold time
LRCK transition before new frame
BCK sampling edge to new frame delay
Audio Data
Figure 15. TDM Timing
P
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