參數(shù)資料
型號(hào)： PCM4108PAPT
廠商： Texas Instruments, Inc.
英文描述： HIGH-PERFORMANCE, 24-BIT, 216kHz SAMPLING, EIGHT-CHANNEL AUDIO DIGITAL-TO-ANALOG CONVERTER
中文描述： 高性能，24位，216kHz的最大采樣，八聲道音頻數(shù)字模擬轉(zhuǎn)換器
文件頁(yè)數(shù)： 28/39頁(yè)
文件大?。?/td> 551K
代理商： PCM4108PAPT
./0
SBAS354 JUNE 2005
www.ti.com
28
CONTROL REGISTER DEFINITIONS (SOFTWARE MODE ONLY)
The PCM4108 includes a small set of control registers, which are utilized to configure the full set of on-chip functions in
Software mode. The register maps for register Banks A and B are shown in Table 6 and Table 7, respectively. Register 0
is reserved for factory use and should not be written to for normal operation. Register 0 defaults to all zero data on power
up or reset.
Table 6. Control Register Map for Bank A
CONTROL REGISTER ADDRESS
(HEX)
MSB
BIT 7
BIT 6
0
BIT 5
0
BIT 4
0
BIT 3
0
BIT 2
0
BIT 1
0
LSB
BIT 0
0
0
0
1
AT17
AT16
AT15
AT14
AT13
AT12
AT11
AT10
2
AT27
AT26
AT25
AT24
AT23
AT22
AT21
AT20
3
AT37
AT36
AT35
AT34
AT33
AT32
AT31
AT30
4
AT47
AT46
AT45
AT44
AT43
AT42
AT41
AT40
5
MUT4
MUT3
MUT2
MUT1
ZDM
PHASE
DEM1
DEM0
6
RST
0
0
0
PDN34
PDN12
FS1
FS0
7
0
0
BCKE
LRCKP
0
FMT2
FMT1
FMT0
Register 1: Attenuation Control Register Channel 1
BIT 7 (MSB)
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0 (LSB)
AT17
AT16
AT15
AT14
AT13
AT12
AT11
AT10
This register controls the digital output attenuation for
Channel 1.
Default: AT1[7:0] = 255, or 0dB
Let N = AT1[7:0].
For N = 16 to 255, Attenuation (dB) = 0.5 x (255 – N)
For N = 0 to 15, Attenuation (dB) = Infinite (Muted)
Register 2: Attenuation Control Register – Channel 2
BIT 7 (MSB)
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0 (LSB)
AT27
AT26
AT25
AT24
AT23
AT22
AT21
AT20
This register controls the digital output attenuation for
Channel 2.
Default: AT2[7:0] = 255, or 0dB
Let N = AT2[7:0].
For N = 16 to 255, Attenuation (dB) = 0.5 x (255 – N)
For N = 0 to 15, Attenuation (dB) = Infinite (Muted)
Register 3: Attenuation Control Register – Channel 3
BIT 7 (MSB)
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0 (LSB)
AT37
AT36
AT35
AT34
AT33
AT32
AT31
AT30
This register controls the digital output attenuation for
Channel 3.
Default: AT3[7:0] = 255, or 0dB
Let N = AT3[7:0].
For N = 16 to 255, Attenuation (dB) = 0.5 x (255 – N)
For N = 0 to 15, Attenuation (dB) = Infinite (Muted)
Register 4: Attenuation Control Register – Channel 4
BIT 7 (MSB)
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0 (LSB)
AT47
AT46
AT45
AT44
AT43
AT42
AT41
AT40
This register controls the digital output attenuation for
Channel 4.
Default: AT4[7:0] = 255, or 0dB
Let N = AT4[7:0].
For N = 16 to 255, Attenuation (dB) = 0.5 x (255 – N)
For N = 0 to 15, Attenuation (dB) = Infinite (Muted)
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