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參數(shù)資料
| 型號： | PCM67U |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Advanced 1-Bit BiCMOS Dual 18-Bit Digital-To-Analog Converter(先進的1位BiCMOS雙路18位D/A轉(zhuǎn)換器) |
| 中文描述： | 先進的1位的BiCMOS雙18位數(shù)字到模擬轉(zhuǎn)換器（先進的1位的BiCMOS雙路18位的D / A轉(zhuǎn)換器） |
| 文件頁數(shù)： | 10/12頁 |
| 文件大小： | 138K |
| 代理商： | PCM67U |
10
PCM67/69A
THEORY OF OPERATION
Digital converters in audio systems have traditionally utilized
a laser-trimmed, current-source DAC architecture. Unfortu-
nately, this type of technology suffers from the problems
inherent in switching widely varying current levels. Design
improvements have helped, but DACs of this type still exhibit
low-level nonlinearity due to errors at the major carry.
Recently, DACs employing a different architecture have been
introduced. Most of these DACs utilize a one-bit DAC with
“noise shaping” techniques and very high oversampling rate
to achieve the digital-to-analog conversion. Basically, the
trade-off is from very accurate but slow current sources to one
rapidly sampled current source whose average output in the
audio frequency range is equal to the current desired. Noise
shaping insures that the “undesirable” frequencies associated
with one-bit DAC output lie outside the audio range.
These “Bitstream”, “MASH”, or one-bit DACs overcome the
low level linearity problems of conventional DACs, since
there can be no major carry error. However, this architecture
exhibits problems of its own: signal-to-noise performance is
usually worse than a similar conventional DAC, “dither
noise” may be needed in order to get rid of unwanted tones, a
separate high-speed clock may be required, the part may show
sensitivity to clock jitter, and a high-order low-pass filter is
necessary to filter the DAC output.
The PCM67/69A is a cross between these two architectures.
It includes both a conventional laser-trimmed, current-source
DAC and an advanced one-bit DAC. The conventional DAC
is a 10-bit DAC where each bit weight has been trimmed to 18-
bit linearity. The one-bit DAC has a weight equal to bit 10 and
employs a first-order noise shaper to generate the “bitstream.”
This approach does not eliminate all the problems associated
with the two architectures but rather minimizes them as much
as possible. The conventional DAC still exhibits some major
carry error which would normally reduce low-level linearity.
However, to reduce this error even further, the PCM67/69A
utilizes an offset technique whereby bit n is subtracted from
the digital input code whenever it is positive (see Figure 1 and
Table I). When this is done, an offset current equal to the
weight of bit n is switched in to compensate. This offset comes
from a one-bit DAC which has also been trimmed to 18-bit
linearity. While this technique doesn’t remove the major carry
error completely, the “glitch” is only present in higher ampli-
tude signals where it is much less audible.
As for the one-bit DAC, a number of problems with this
architecture are also reduced: the DAC is designed to operate
from the system clock, thus eliminating the need for a separate
clock; the lower quantizing level of the DAC make it less
sensitive to clock jitter; and output filtering requirements are
reduced because “out-of-band noise” has smaller amplitude,
is “farther-out,” and increases much more slowly due to the
first-order noise shaper. Still, it is important to keep in mind
that the one-bit DAC imposes some design considerations.
Figure 2 shows the THD + N of the converter versus “System
Clock” frequency. This is the clock used to operate the one-bit
DAC and noise shaper. Generally, the higher the oversampling
the better. However, near full-scale, the converter is limited by
other constraints and higher clock frequencies (past 96f
s
) tend
to slightly worsen its performance. At low levels, perfor-
mance improves almost linearly with increasing clock fre-
quency. The one-bit DAC was designed to operate between
96f
s
(4X oversampling) and 384f
s
(16X oversampling). But,
it can be operated at 48f
s
(2X oversampling) with slightly
reduced performance.
TOTAL HARMONIC DISTORTION + NOISE
A key specification for audio DACs is usually total harmonic
distortion plus noise (THD + N). For the PCM67/69A, THD
+ N is tested in production as shown in Figure 12. Digital data
words are read into the PCM67/69A at eight times the stan-
dard compact disk audio sampling frequency of 44.1kHz
(352.8kHz) so that a sine wave output of 991Hz is realized.
The output of the DAC goes to an I-to-V converter, then to a
programmable gain amplifier to provide gain at lower signal
output test levels, and then through a 40kHz low pass filter
before being fed into an analog type distortion analyzer.
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相關代理商/技術(shù)參數(shù) |
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