參數(shù)資料
型號(hào): PDIUSBP11ADB
廠商: NXP SEMICONDUCTORS
元件分類: 通用總線功能
英文描述: Universal Serial Bus Transceiver
中文描述: LINE TRANSCEIVER, PDSO14
封裝: 5.30 MM, SSOP-14
文件頁(yè)數(shù): 3/12頁(yè)
文件大?。?/td> 120K
代理商: PDIUSBP11ADB
Philips Semiconductors
Product specification
PDIUSBP11A
Universal Serial Bus transceiver
1999 Jun 04
3
PIN DESCRIPTION
PIN
No.
PIN
SYMBOL
I/O
NAME AND FUNCTION
3
RCV
O
Receive data. CMOS level output for USB differential input
2
OE#
I
Output Enable. Active LOW, enables the transceiver to transmit data on the bus.
When not active the transceiver is in receive mode
1
MODE
I
Mode. When left unconnected, a weak pull-up transistor pulls it to V
CC
and in this
mode, the PDIUSBP11A is backward compatible to PDIUSBP11. When connected to
GND, the VMO/FSEO pin takes the function of FSEO (Force SEO).
Inputs to differential driver. (Outputs from SIE).
MODE
VPO
VMO/FSEO
RESULT
0
0
0
1
1
0
1
0
1
Logic “0”
SE0#
Logic “1”
SEO#
12, 13
PO
MO
SEO
V
, V
/F
I
1
0
0
1
1
0
1
0
1
SE0#
Logic “0”
Logic “1”
Illegal code
Gated version of D– and D+. Outputs are logic “0” and logic “1”. Used to detect single
ended zero (SE0#), error conditions, and interconnect speed. (Inputs to SIE).
VP
VM
RESULT
4, 5
V
P
, V
M
O
0
0
1
1
0
1
0
1
SE0#
Low Speed
Full Speed
Error
11, 10
D+, D–
AI/O
Data+, Data–. Differential data bus conforming to the Universal Serial Bus standard.
6
SUSPND
I
Suspend. Enables a low power state while the USB bus is inactive. While the suspnd
pin is active it will drive the RCV pin to a logic “0” state. Both D+ and D– are tri-stated.
9
SPEED
I
Edge rate control. Logic “1” operates at edge rates for “full speed”. Logic “0” operates
edge rates for “l(fā)ow speed”.
14
V
CC
GND
3.0V to 3.6V power supply
7
Ground reference
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