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參數(shù)資料
| 型號： | PDU1032H-2MC5 |
| 廠商： | Data Delay Devices, Inc. |
| 英文描述： | 5-BIT, ECL-INTERFACED PROGRAMMABLE DELAY LINE (SERIES PDU1032H) |
| 中文描述： | 5位，經(jīng)過ECL接口可編程延遲線（系列PDU1032H） |
| 文件頁數(shù)： | 5/5頁 |
| 文件大?。?/td> | 148K |
| 代理商： | PDU1032H-2MC5 |
PDU1032H
DELAY LINE AUTOMATED TESTING
TEST CONDITIONS
INPUT:
Ambient Temperature:
25
o
C
±
3
o
C
Supply Voltage (Vcc):
-5.0V
±
0.1V
Input Pulse:
Source Impedance:
Rise/Fall Time:
Pulse Width:
Period:
NOTE:
The above conditions are for test only and do not in any way restrict the operation of the device.
OUTPUT:
Load:
C
load
:
Threshold:
(V
OH
+ V
OL
) / 2
(Rising & Falling)
50
to -2V
5pf
±
10%
Standard 10KH ECL
levels
50
Max.
2.0 ns Max. (measured
between 20% and 80%)
PW
IN
= 1.5 x Total Delay
PER
IN
= 10 x Total Delay
OUT
OUT
TRIG
IN
REF
TRIG
Test Setup
DEVICE UNDER
TEST (DUT)
OSCILLOSCOPE
PULSE
GENERATOR
IN
ADDRESS SELECT
Timing Diagram For Testing
D
RISE
D
FALL
PER
IN
PW
IN
T
RISE
T
FALL
20%
20%
80%
50%
50%
50%
V
IH
V
IL
V
OH
V
OL
INPUT
SIGNAL
OUTPUT
SIGNAL
Doc #97045
2/25/03
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
5
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PDU1032H-3 | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:5-BIT, ECL-INTERFACED PROGRAMMABLE DELAY LINE (SERIES PDU1032H) |
| PDU1032H-3C4 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Delay Line |
| PDU1032H-3C5 | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:5-BIT, ECL-INTERFACED PROGRAMMABLE DELAY LINE (SERIES PDU1032H) |
| PDU1032H-3M | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:5-BIT, ECL-INTERFACED PROGRAMMABLE DELAY LINE (SERIES PDU1032H) |
| PDU1032H-3MC4 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Delay Line |
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