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參數(shù)資料
| 型號： | PE42674DTI |
| 廠商： | PEREGRINE SEMICONDUCTOR CORP |
| 元件分類： | 開關(guān) |
| 英文描述： | SP7T UltraCMOS WEDGE Switch 100 -3000 MHz, +67 dBm IIP3 |
| 中文描述： | 100 MHz - 3000 MHz RF/MICROWAVE SGL POLE SEVEN THROW SWITCH, 1 dB INSERTION LOSS |
| 封裝： | FLIP CHIP-15 |
| 文件頁數(shù)： | 2/4頁 |
| 文件大小： | 109K |
| 代理商： | PE42674DTI |
Product Brief
PE42674
Page 2 of 4
2007 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0227-01
│ UltraCMOS RFIC Solutions
Contact sales@psemi.com for full version of datasheet
Table 1. Target Electrical Specifications @ +25 °C, VDD = 2.75 V
Table 2. Operating Ranges
Table 3. Absolute Maximum Ratings
Part performance is not guaranteed under these
conditions. Exposure to absolute maximum conditions
for extended periods of time may adversely affect
reliability. Stresses in excess of absolute maximum
ratings may cause permanent damage.
Parameter
Condition
Typ
Units
Insertion loss 1,2
TX - Ant (850 / 900)
TX - Ant (1800 / 1900)
TX1 - Ant (1900 / 2200)
RX - Ant (850 / 900)
RX - Ant (1800 / 1900)
0.65
0.75
0.80
0.90
1.0
dB
Return Loss
Port under test in on state
20
dB
Isolation
TX - RX (850 / 900)2
TX - RX (1800 / 1900)2
TX - TX (850 / 900)
TX - TX (1800 / 1900)
TX1 - RX (1900 / 2100)2
TX - TX1 (850 / 900)2
TX - TX1 (1800 / 1900)2
38.5
31
30.5
25
30
25
dB
2nd Harmonic3
TX3 850 / 900 MHz, +35 dBm output power, 50
TX2 1800 / 1900 MHz, +33 dBm output power, 50
-85
-84
dBc
3rd Harmonic3
TX3 850 / 900 MHz, +35 dBm output power, 50
TX2 1800 / 1900 MHz, +33 dBm output power, 50
-79
-76
dBc
WCDMA Band I IMD3
TX1 – Measured in a 50
system at 2.14 GHz at the TX1 port. Input signals are referenced to the
ANT port with +20 dBm CW signal at 1.95 GHz and -15 dBm CW signal at 1.76 GHz
-109
dBm
WCDMA Band I IIP3
TX1 – Measured in a 50
system at 2.14 GHz at the TX1 port. Input signals are referenced to the
ANT port with +20 dBm CW signal at 1.95 GHz and -15 dBm CW signal at 1.76 GHz
+67
dBm
Switching time
50% of control to (10/90%) RF
2
s
Notes: 1. The Device was matched with a 0.5pF cap on the ANT trace.
2. All port combinations may not meet typical performance. Limits will be established after device characterization.
3. Pulsed RF input duty cycle of 50% and 4620 s, measured per 3GPP TS 45.005.
Parameter
Symbol
Min Typ Max Units
Temperature range
TOP
-40
25
+85
°C
VDD Supply Voltage
VDD
2.5
2.75
3.2
V
IDD Power Supply Current
(VDD = 2.75 V)
IDD
13
50
A
TX input power4 (VSWR
≤ 3:1)
824-915 MHz
+35
dBm
+33
RX input power4 (VSWR
=1:1)
PIN
+20
dBm
Control Voltage High5
VIH
1.4
V
Control Voltage Low5
VIL
0.4
V
PIN
TX input power4 (VSWR
≤ 3:1)
1710-1910 MHz
Notes: 4. Pulsed RF input duty cycle of 50% and 4620 s, measured
per 3GPP TS 45.005.
5. VIH and VIL values apply to a VDD Supply Voltage range of
2.5-2.95 volts.
Symbol
Parameter/Conditions
Min
Max
Units
VDD
Power supply voltage
-0.3
4.0
V
VI
Voltage on any DC input
-0.3
VDD+ 0.3
V
TST
Storage temperature range
-65
+150
°C
PIN(50 )
TX input power (50
) 6,7
824-915 MHz
+38
dBm
TX input power (50
) 6,7
1710-1910 MHz
+36
RX input power (50
) 6,7
+23
PIN (∞:1)
TX input power (VSWR = (
∞:1)6,7
824-915 MHz
+35
dBm
TX input power (VSWR = (
∞:1)6,7
1710-1910 MHz
+33
VESD
ESD Voltage (HBM, MIL_STD 883
Method 3015.7)
1500
V
Notes: 6. Pulsed RF input duty cycle of 50% and 4620 s, measured
per 3GPP TS 45.005.
7. VDD within operating range specified in Table 2.
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