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參數(shù)資料
| 型號： | PEEL18CV8ZJ-25 |
| 英文描述： | CMOS Programmable Electrically Erasable Logic Device |
| 中文描述： | 的CMOS電可擦除可編程邏輯器件 |
| 文件頁數(shù)： | 4/10頁 |
| 文件大?。?/td> | 442K |
| 代理商： | PEEL18CV8ZJ-25 |
Anachip Corp.
www.anachip.com.tw Rev. 1.0 Dec 16, 2004
4/10
the I/O pin. Otherwise, the output buffer is switched into the
high-impedance state.
Under the control
of the output
enable term, the I/O pin can func-
tion as a dedicated input, a dedicated output,
or a bi-directional I/ O.
Opening
every connection on
the output
enable term
will
per-
manently
enable the output
buffer
and yield
a dedicated
output.
Conversely, if every connection is intact, the enable term will
always be logically false and the I/O will
function as a dedicated
input.
Input/Feedback Select
The PEEL18CV8Z macrocell also provides control over the
feedback path. The input/feedback
signal associated with each I/ O
macrocell can be obtained from three different locations; from the
I/O input
pin, from the
Q output of
the flip-flop
(registered
feedback), or directly
from the OR gate (combinatorial
feed-
back).
Bi-directional I/O
The
input/feedback signal is taken from the I/O
pin
when using the
pin
as
a dedicated
input or as a
bi-directional
I/O. (Note that
it is
possible
to create
a registered
output function with a
bi-direc-
tional I/O, refer to Figure 9).
Combinatorial Feedback
The signal-select multiplexer
gives
the macrocell
the ability
to
feedback the
output of the
OR gate, bypassing
the output
buffer,
regardless
of whether the output function is
registered or combi-
natorial. This feature allows
the
creation of
asynchronous latches,
even when the output must be disabled. (Refer to configurations
5, 6,
7, and 8 in Figure 11.)
Figure 9 Block Diagram of the PEEL18CV8Z
I/O Macrocell
Registered Feedback
Feedback also can be taken from the register, regardless of
whether the
output function is programmed
to be combinatorial
or registered. When implementing
a combinatorial output
func-
tion, registered feedback allows
for the internal
latching of
states
without giving up the use
of the external
output.
Programmable Clock Options
A
unique
feature
of
the
PEEL18CV8Z
is
a
programmable
clock multiplexer
that allows the user to select true or comple-
ment forms
of either input pin
or product-term clock sources.
Zero Power Feature
The
CMOS
PEEL18CV8Z
features
“Zero-Power”
standby
operation
for
ultra-low
power
consumption.
With
the
“Zero-
Power” feature, transition-detection circuitry monitors
the inputs,
I/Os
(including
CLK) and feedbacks. If these
signals
do not
change for a period of time greater than approximately two t
PD
’s,
the
outputs are
latched
in
their
current state and the device auto-
matically
powers
down.
When
the
next
signal
transition
is
detected, the device will “wake up” for active operation until the
signals
stop switching
long enough
to trigger
the next power-
down. (Note that the tPD
is approximately
5 ns. slower on the first
transition
from sleep mode.)
As
a
result of the
“Zero-Power” feature,
significant power sav-
ings can be realized for combinatorial or sequential operations
when the inputs or
clock change at a modest rate. See Figure
5.
Figure 10 Typical ICC vs. Input Clock Frequency
for the 18CV8Z
100
10
1
0.1
0.01
0.001
0.001
0.01
0.1
1
10
Frequency in MHz
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PEEL18CV8ZJ-25L | CMOS Programmable Electrically Erasable Logic Device |
| PEEL18CV8Z | CMOS Programmable Electrically Erasable Logic Device |
| PEEL18CV8ZT-25L | CMOS Programmable Electrically Erasable Logic Device |
| PEEL18CV8ZTI-25 | CMOS Programmable Electrically Erasable Logic Device |
| PEEL18CV8ZTI-25L | CMOS Programmable Electrically Erasable Logic Device |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PEEL18CV8ZJ25L | 制造商:Zetex / Diodes Inc 功能描述:SPLD PEEL 制造商:Zetex / Diodes Inc 功能描述:SPLD PEEL? Family 8 Macro Cells 38.4MHz 5V 20-Pin PLCC |
| PEEL18CV8ZJ-25L | 功能描述:SPLD - 簡單可編程邏輯器件 10 Input 8 I/O 25ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24 |
| PEEL18CV8ZJI-25 | 功能描述:SPLD - 簡單可編程邏輯器件 10 INP 8 I/O 25ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24 |
| PEEL18CV8ZJI-25L | 功能描述:SPLD - 簡單可編程邏輯器件 10 Input 8 I/O 25ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24 |
| PEEL18CV8ZP-25 | 功能描述:SPLD - 簡單可編程邏輯器件 10 INP 8 I/O 25ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24 |
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