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參數(shù)資料
| 型號(hào)： | PI0256WSN |
| 英文描述： | 50-mm-Pitch Wide Aperture Spectroscopic Photodiode Arrays |
| 中文描述： | 50毫米間距寬孔徑光譜光電二極管陣列 |
| 文件頁(yè)數(shù)： | 5/8頁(yè) |
| 文件大?。?/td> | 773K |
| 代理商： | PI0256WSN |
PI0128WSN, PI0256WSN, PI0512WSN
Engineering Data Sheet
Page 5 of 8
Revised March 21, 2002
Clock and Voltage Requirements
The clocking requirements are relatively simple. As it
was indicated in Figure 5 and Table 1, there are only
two input signals that require clocked inputs. They are
CLK, the clock for the shift register, and START, the
shift register start pulse. The timing specifications and
the symbol definition for Figure 6 are listed in Table 2.
The control clock amplitudes for I/Os are compatible
with the 5-Volt CMOS devices.
Figure 6. Timing diagram.
Table 2. Symbol definitions and timing specifications for timing diagram.
Item
Symbol
Min
Typical
Max
Units
Clock cycle time
to
666 (128WSN)
666 (256WSN)
1000 (512WSN)
566 (128WSN)
566 (256WSN)
900 (512WSN)
100
1
100
100
10000
ns
Clock high pulse width
twh
ns
Clock low pulse width
Clock duty cycle
Data setup time
Data hold time
EOS low-to-high delay
EOS high-to-low delay
Signal delay time
twl
ns
%
ns
ns
ns
ns
ns
50
99
tds
tdh
telh
tehl
tsd
400
400
50
Signal settling time
tsh
566 (128WSN)
566 (256WSN)
900 (512WSN)
ns
Signal settle to clock edge
tsch
0
ns
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