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參數(shù)資料
| 型號： | PI2BV3868 |
| 英文描述： | Digital Switch | 3.3V. 10-Bit 2:1 Mux/DeMux Switch w/25 Ohm resistor |
| 中文描述： | 數(shù)字開關(guān)| 3.3。 10位2:1復(fù)用/解復(fù)用開關(guān)w/25歐姆電阻 |
| 文件頁數(shù)： | 3/4頁 |
| 文件大小： | 304K |
| 代理商： | PI2BV3868 |
3
PS8471D 10/10/01
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PI2BV3867
2.5V, 10-Bit, 2-Port
266 MHz DDR Bus Switch
Switching Characteristics over Operating Range
Notes:
1. See test circuit and waveforms.
2. This parameter is guaranteed but not tested on Propagation Delays.
3. The bus switch contributes no propagational delay other than the RC delay of the ON resistance of the switch and load capacitance.
The time constant for the switch alone is of the order of 1ns for 50pF load. Since this time constant is much smaller than the rise/
fall times of typical driving signals, it adds very little propagational delay to the system. Propagational delay of the bus switch when
used in a system is determined by the driving circuit on the switch's driving side and its interaction with the load on the driven side.
s
e
m
a
a
P
n
o
D
s
o
n
o
C
)
7
6
8
3
V
B
2
P
s
U
.
m
o
C
.
M
.
a
M
t
t
H
L
L
H
P
P
y
a
D
o
x
B
n
o
a
p
o
x
A
o
)
x
A
,
B
C
L
=
,
p
0
3
o
0
0
5
=
R
L
s
m
h
1
s
t
t
H
L
Z
Z
P
P
e
x
m
B
i
e
x
A
a
E
o
s
B
B
r
E
1
3
1
5
t
t
Z
Z
H
L
P
P
e
m
B
i
e
x
A
a
D
o
s
B
B
x
r
E
1
3
1
8
Parameter Measurements
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
t
T
1
S
t
D
P
t
n
e
p
O
t
Z
t
L
P
L
Z
P
V
x
2
C
C
D
t
Z
H
P
H
Z
P
N
G
Notes:
1. C
L
includes probe and jig capacitance.
2. Waveform 1 is for an output with internal conditions such that the output is LOW except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is HIGH except when disabled by the output control.
3. All input pulses are supplied by generators having the following characteristics: PRR<10MHz, Z
O
= 50 ohms, t
R
≤
2ns, t
F
≤
2ns.
4. The outputs are measured one at a time with one transition per measurement.
5. t
PLZ
and t
PHZ
are the same as t
DIS
.
6. t
PZL
and t
PZH
are the same as t
EN
.
7. t
PLH
and t
PHL
are the same as t
PD
.
Input
t
PLH
t
PHL
V
CC
V
CC
/2
V
CC
/2
V
CC
/2
V
CC
/2
0V
Output
V
OH
V
OL
t
PZL
Output
Control
(Low Level
Enabling)
0V
V
CC
/2
V
CC
/2
V
CC
/2
V
CC
/2
t
PLZ
t
PHZ
V
OL
V
OH
0V
t
PZH
+0.15V
-0.15V
Output
Waveform 1
S1 at 2xV
CC
(see Note 2)
Output
Waveform 2
S1 at GND
(see Note 2)
V
OH
V
OH
V
OL
V
CC
500
500
GND
2xV
CC
Open
S1
LOAD CIRCUIT
From Output
Under Test
C
L
= 30pF
(See note 1)
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