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參數(shù)資料
| 型號： | PI2EQX4401DZFE |
| 廠商： | Pericom |
| 文件頁數(shù)： | 1/8頁 |
| 文件大小： | 0K |
| 描述： | IC PCI-E REPEATER 36TQFN |
| 標準包裝： | 60 |
| 類型： | 轉發(fā)器 |
| Tx/Rx類型： | CML |
| 電源電壓： | 1.7 V ~ 1.9 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 36-WFQFN 裸露焊盤 |
| 供應商設備封裝： | 36-TQFN-EP（6x5） |
| 包裝： | 管件 |
1
PS8872H
09/26/08
Features
One high-speed PCI-Express lane
Adjustable Transmiter De-Emphasis & Amplitude
Adjustable Receiver Equalization
One Spread Spectrum Reference Clock Buffer Output
Input Signal Level Detect and Output Squelch
100Ω Differential CML I/O’s
Low Power (100mW per Channel)
Stand-by Mode – Power Down State
VDD Operating Range: 1.8V ±0.1V
Packaging (Pb-free & Green):
— 36-pad TQFN (ZF36)
Description
Pericom Semiconductor’s PI2EQX4401D is a low power,
PCI-Express compliant signal re-driver. The device provides
programmable equalization, amplication, and de-emphasis
by using 4 select bits, SEL[0:3], to optimize performance
over a variety of physical mediums by reducing Inter-symbol
interference. PI2EQX4401D supports two 100
Ω Differential
CML data I/O’s between the Protocol ASIC to a switch fabric,
across a backplane, or extends the signals across other distant
data pathways on the user’s platform.
The integrated equalization circuitry provides exibility with
signal integrity of the PCI-express signal before the re-driver.
Whereas the integrated de-emphasis circuitry provides exibility
with signal integrity of the PCI-express signal after the Re-
Driver.
A low-level input signal detection and output squelch function
is provided for both channels. Each channel operates fully
independantly. When a channel is enabled (EN_x=1) and
operating, that channel's input signal level (on xl+/-) determines
whether the output is enabled. If the input level of the channel
falls below the active threshold level (Vth-) then the output driver
switches off, and the pin is pulled to VDD via a high impedance
resistor.
In addition to providing signal re-conditioning, Pericom’s
PI2EQX4401D also provides power management Stand-by
mode operated by a Bus Enable pin. A differential clock buffer
is provided for test and other system requirements. This clock
function is not used by the data channels.
PI2EQX4401D
2.5Gbps x1 Lane Serial PCI-Express Repeater/Equalizer
with Clock Buffer & Signal Detect Feature
08-0241
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| PI2EQX4401DZFEX | 功能描述:緩沖器和線路驅(qū)動器 2.5Gbps PCI-Express ReDriver RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| PI2EQX4401ZFE | 功能描述:時鐘緩沖器 2.5Gbps Quad Serial PCI EX RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| PI2EQX4401ZFEX | 功能描述:時鐘緩沖器 2.5Gbps Quad Serial PCI EX RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| PI2EQX4402 | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:2.5Gbps x2 Lane Serial PCI Express Repeater/Equalizer |
| PI2EQX4402D | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:2.5 Gbps x2 Lane Serial PCI Express Repeater/Equalizer with Signal Detect feature |
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