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參數(shù)資料
| 型號(hào)： | PI6C10807LE |
| 廠商： | Pericom |
| 文件頁數(shù)： | 2/7頁 |
| 文件大小： | 0K |
| 描述： | IC CLK BUFF 1:10 250MHZ 20TSSOP |
| 產(chǎn)品變化通告： | Product Discontinuation 09/Dec/2010 |
| 標(biāo)準(zhǔn)包裝： | 11,988 |
| 類型： | 扇出緩沖器（分配） |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:10 |
| 差分 - 輸入:輸出： | 無/無 |
| 輸入： | LVCMOS，LVTTL |
| 輸出： | LVCMOS，LVTTL |
| 頻率 - 最大： | 250MHz |
| 電源電壓： | 1.65 V ~ 2.7 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-TSSOP |
| 包裝： | 管件 |
2
PS8862L
05/01/09
PI6C10807
1.8V/2.5V, 250MHz, 1:10 Networking Clock Buffer
Storage Temperature...........................................................–65°C to +150°C
VDD Voltage ..........................................................................–0.5V to +3.6V
Output Voltage (max. 3.6V) .......................................... –0.5V to VDD+0.5V
Input Voltage (max 3.6V).............................................. –0.5V to VDD+0.5V
2.5V Absolute Maximum Ratings (Above which the useful life may be impaired. For user guidelines only, not tested.)
Note: Stresses greater than those listed under MAXI-
MUM RATINGS may cause permanent damage to the
device. This is a stress rating only and functional operation
of the device at these or any other conditions above those
indicated in the operational sections of this specication is
not implied. Exposure to absolute maximum rating condi-
tions for extended periods may affect reliability.
2.5V AC Characteristics (Over Operating Range: VDD = 2.5V ± 0.2V, TA = -40° to 85°C)
Parameters
Description
Test Conditions1
Min.
Typ
Max.
Units
FIN
Input Frequency
0
250
MHz
tR/tF
CLKn Rise/Fall Time
20% to 80%
1.0
ns
tSK(P)3. 5
Pulse Skew between opposite transitions
(tPHL-tPLH) of the same output
Vin > VDD
CL = 5pF, 125 MHz
100
200
ps
tPLH, tPHL2, 5
Propagation Delay BUF_IN to CLKn
CL = 5pF, 125 MHz
1.0
1.5
2.0
ns
tSK(O)3, 5
Output to Output Skew between any two
outputs of the same device @ same transition
60
ps
tSK(T)3, 5
Part to Part Skew between two identical out-
puts of different parts on the same board4
300
tdc_in 5
Duty Cycle In @ Ins edge rate
45
55
%
tdc_out 5
Duty Cycle Out
40
57.5
Notes:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew measured at worst case temperature (max. temp).
4.
Identical conditions: loading, transitions, supply voltage, temperature, package type and speed grade.
5.
Outputs are measured at VDD/2
2.5V DC Characteristics (Over Operating Range: VDD = 2.5V ± 0.2V, TA = -40° to 85°C)
Parameters Description
Test Conditions1
Min.
Typ.2
Max.
Units
VDD
Supply Voltage
2.3
2.5
2.7
VIH
Input HIGH Voltage
Logic HIGH level
1.7
3.6
V
VIL
Input LOW Voltage
Logic LOW level
-0.3
0.7
II
Input Current
VDD = Max, Vin = VDD or GND
15
μA
VOH
Output High Voltage
VDD = Min., VIN = VIH or VIL
IOH = -1mA
2.0
V
IOH = -2mA
1.7
IOH = -8mA
1.7
VOL
Output LOW Voltage
VDD = Min., VIN - VIH or VIL
IOL = 1mA
0.1
IOL = 2mA
0.2
IOL = 8mA
0.2
Notes:
1.
For Max. or Min. conditions, use appropriate operating range values.
2. Typical values are at VDD = 2.5V, +25°C ambient and maximum loading.
09-0084
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